Abstract: A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology, is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator which permits direct or indirect addressing while reducing the number of ROM instructions required and hence the size of the ROM to permit fabrication on the smaller chip is embodied in the present invention. All memory instructions contain an address select bit to choose either the address contained in the ROM instruction word or the contents of the RAM address register which is loaded from the adder output. The RAM address register contents are incremented or added to by the adder to provide indirect addressing of the RAM while the ROM instruction word provides direct addressing of the RAM.

Abstract: A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology, is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator is a universal condition latch which is so connected as to permit the state thereof to be determined by multiple sources while reducing the number of ROM instructions required and hence the size of the ROM to permit fabrication on the smaller chip. The condition latch state is determined, for example, by the logical OR of up to four flags after a test flag instruction, by the logical OR of up to four keyboard inputs after a test key instruction, by the carry output of the adder after any add instruction, or by the results of an adder compare after any compare instruction.