Abstract: A method for fabricating a multi-layer resonator assembly includes sequentially fabricating a plurality of vertically-stacked resonator layers including, for each resonator layer of the plurality of resonator layers, depositing a dielectric layer, forming at least one film bulk acoustic resonator (FBAR) cavity in the deposited dielectric layer, filling each FBAR cavity of the at least one FBAR cavity with a sacrificial material block, and depositing a FBAR material stack over the at least one FBAR cavity. The deposited FBAR material stack is in contact with the sacrificial material block and the dielectric layer. The method further includes removing the sacrificial material block from the at least one FBAR cavity for each resonator layer of the plurality of resonator layers subsequent to sequentially fabricating the plurality of resonator layers.

Abstract: An integrated circuit structure comprising a substrate having an upper surface; a gallium nitride layer disposed on the upper surface of the substrate; and a photoconductive semiconductor switch laterally disposed alongside a transistor on the gallium nitride layer integrated into the integrated circuit structure wherein a regrown gallium nitride material is disposed on the photoconductive semiconductor switch and operatively coupled with the wafer.

Abstract: An integrated circuit structure comprising a substrate having an upper surface; a gallium nitride layer disposed on the upper surface of the substrate; and a photoconductive semiconductor switch laterally disposed alongside a transistor on the gallium nitride layer integrated into the integrated circuit structure wherein a regrown gallium nitride material is disposed on the photoconductive semiconductor switch and operatively coupled with the wafer.

Abstract: An integrated circuit structure comprising a substrate having an upper surface; a gallium nitride layer disposed on the upper surface of the substrate; and a photoconductive semiconductor switch laterally disposed alongside a transistor on the gallium nitride layer integrated into the integrated circuit structure.