Abstract: A method of fabricating a color filter substrate is provided. First, a transparent substrate having a display region, a peripheral region and a buffer region is provided. Next, a shielding pattern layer is formed in the peripheral region of the transparent substrate, and a color filter layer is formed in the display region of the transparent substrate. Further, at least one buffer pattern is formed in the buffer region.

Abstract: A liquid crystal display (LCD) panel including a color filter substrate, a liquid crystal layer and a semiconductor array substrate is provided. The liquid crystal layer is disposed between the two substrates. The semiconductor array substrate disposed at one side of the color filter substrate includes a transparent base, a planar layer, several pixel electrodes and an opaque layer. The pixel electrodes are arranged in an array on the planar layer, which covers the transparent base. Each two adjacent pixel electrodes are spaced by a gap. The opaque layer is disposed in the planar layer, and is located beneath each gap. The opaque layer having an extended portion disposed at two sides thereof is extended towards two sides of each gap to be under part of the pixel electrodes. The opaque layer is at least a half of the planar layer in thickness.

Abstract: A liquid crystal display bottom substrate with bumps is disclosed, which comprises: one thin film transistor located on a surface of a substrate, a passivation layer covered over the surface of the thin film transistor and that of the substrate, and a reflective metal layer formed over the passivation layer. A plurality of bumps are formed on the surface of the passivation layer, wherein the bumps have asymmetric shapes in the cross sections, and the projection of the center of said bumps on the substrate is not overlapped with the projection of the peak of the same bumps.

Abstract: A liquid crystal display (LCD) panel including a color filter substrate, a liquid crystal layer and a semiconductor array substrate is provided. The liquid crystal layer is disposed between the two substrates. The semiconductor array substrate disposed at one side of the color filter substrate includes a transparent base, a planar layer, several pixel electrodes and an opaque layer. The pixel electrodes are arranged in an array on the planar layer, which covers the transparent base. Each two adjacent pixel electrodes are spaced by a gap. The opaque layer is disposed in the planar layer, and is located beneath each gap. The opaque layer having an extended portion disposed at two sides thereof is extended towards two sides of each gap to be under part of the pixel electrodes. The opaque layer is at least a half of the planar layer in thickness.

Abstract: An active device array substrate having a display area and a circuit area connected thereto is provided. The active device array substrate includes scan lines, data lines intersecting the scan lines, pixel units, scan-signal terminals, transmission circuit sets, controlling lines and controlling switches. The pixel units are located in the display area and electrically connect the corresponding scan lines and data lines. The scan-signal terminals, the transmission circuit sets, the controlling lines and the controlling switches are located in the circuit area. Each of the transmission circuit set is respectively connected to a corresponding scan-signal terminal. Each transmission circuit set includes transmission lines corresponding to the scan lines. The controlling lines intersect the transmission lines and the controlling switches are connected to the transmission lines, respectively. The controlling switches connected to the same scan-signal terminals are connected to different controlling lines.

Abstract: A method of fabricating a color filter substrate is provided. First, a transparent substrate having a display region, a peripheral region and a buffer region is provided. Next, a shielding pattern layer is formed in the peripheral region of the transparent substrate, and a color filter layer is formed in the display region of the transparent substrate. Further, at least one buffer pattern is formed in the buffer region.

Abstract: An auto repair structure for liquid crystal display device includes a data line and a gate line. A protective film is formed over the data line and the gate line. A conductive layer and a plurality of contact holes are formed on the protective film. If the data line or the gate line has an open circuit defect, the signal passes through the conductive layer, thereby automatically repairing the liquid crystal display device.

Abstract: A liquid crystal display bottom substrate with bumps is disclosed, which comprises: one thin film transistor located on a surface of a substrate, a passivation layer covered over the surface of the thin film transistor and that of the substrate, and a reflective metal layer formed over the passivation layer. A plurality of bumps are formed on the surface of the passivation layer, wherein the bumps have asymmetric shapes in the cross sections, and the projection of the center of said bumps on the substrate is not overlapped with the projection of the peak of the same bumps.

Abstract: A plurality of scan lines and gate electrodes are formed on a pixel array area of a substrate, and a plurality of bottom pad electrodes are formed on a gate and a source pad area of the substrate. An insulating layer and a plurality of active layers are formed on the substrate. A plurality of signal lines, source/drain electrodes are formed on the pixel array area, and a plurality of top pad electrodes are formed on the gate and the source pad area. A circuit testing process is performed. A passivation layer having via holes is formed on the pixel array area, and a plurality of contact holes are formed in the gate and the source pad area. A patterned transparent conductive layer filling the via holes and the contact holes is formed on the substrate.

Abstract: A plurality of scan lines and gate electrodes are formed on a pixel array area of a substrate, and a plurality of bottom pad electrodes are formed on a gate and a source pad area of the substrate. An insulating layer and a plurality of active layers are formed on the substrate. A plurality of signal lines, source/drain electrodes are formed on the pixel array area, and a plurality of top pad electrodes are formed on the gate and the source pad area. A circuit testing process is performed. A passivation layer having via holes is formed on the pixel array area, and a plurality of contact holes are formed in the gate and the source pad area. A patterned transparent conductive layer filling the via holes and the contact holes is formed on the substrate.