Patents by Inventor Lu Liao

Lu Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240130189
    Abstract: Provided is a display substrate. The display substrate includes: a display region and a bonding region on a side of the display region, wherein the display region includes a plurality of pixel columns; and a wiring structure, disposed between the display region and the bonding region and including a plurality of traces, wherein one of the plurality of traces corresponds to one of the plurality of pixel columns, the plurality of traces are electrically connected to the plurality of pixel columns to supply an electric signal to pixels, and each of the plurality of traces includes a plurality of sub-traces, wherein at least one of line lengths and line widths of sub-traces corresponding to at least a part of the plurality of traces are different, such that total resistances of the at least the part of the plurality of traces are basically equal.
    Type: Application
    Filed: October 22, 2021
    Publication date: April 18, 2024
    Inventors: Yi QU, Maoying LIAO, Junxiu DAI, Lu BAI, Yang ZHOU, Xin ZHANG
  • Patent number: 11170147
    Abstract: A function equivalence check method includes receiving a cell list, receiving an analog constraint of a cell in the cell list, generating the full-coverage input stimuli according to the analog constraint, performing a behavioral-level simulation using the full-coverage input stimuli and according to the behavioral code to generate a behavioral-level simulation result, performing a circuit-level simulation using the full-coverage input stimuli and according to the circuit-level netlist to generate a circuit-level simulation result, and comparing the behavioral-level simulation result and the circuit-level simulation result to generate a comparison report for an analog value auto-comparison.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: November 9, 2021
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Lu Liao, Mei Wang, Yueping Li
  • Patent number: 11133959
    Abstract: An apparatus including a storage medium and a controller is provided. The storage medium stores a mapping of stream Identifiers (IDs) to Virtual Local Area Network (VLAN) tags. The controller is coupled to the storage medium and configured to route a packet for a Time-Sensitive Networking (TSN) network according to the mapping. The routing of the packet includes replacing a VLAN tag in the packet according to the stream ID of the packet and the mapping, so as to maintain the real-time deterministic behavior of delivering data streams in the TSN network.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: September 28, 2021
    Assignee: MOXA INC.
    Inventors: Chi-Chuan Liu, Chun-Yu Lin, Chien-Yu Lai, Wen-Lu Liao
  • Patent number: 11121889
    Abstract: An apparatus including a storage medium and a controller is provided. The storage medium stores a first mapping of stream Identifiers (IDs) to VLAN tags, and a second mapping of the stream IDs to VLAN tag indications. The controller is coupled to the storage medium and configured to route a packet between a Time-Sensitive Networking (TSN) network and a non-TSN network according to the first and second mappings. The routing of the packet includes inserting or removing a VLAN tag in or from the packet according to the stream ID of the packet and the first and second mappings, so as to enable interoperability between the TSN network and the non-TSN network.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: September 14, 2021
    Assignee: MOXA INC.
    Inventors: Chi-Chuan Liu, Chun-Yu Lin, Chien-Yu Lai, Wen-Lu Liao
  • Publication number: 20200356639
    Abstract: A function equivalence check method includes receiving a cell list, receiving an analog constraint of a cell in the cell list, generating the full-coverage input stimuli according to the analog constraint, performing a behavioral-level simulation using the full-coverage input stimuli and according to the behavioral code to generate a behavioral-level simulation result, performing a circuit-level simulation using the full-coverage input stimuli and according to the circuit-level netlist to generate a circuit-level simulation result, and comparing the behavioral-level simulation result and the circuit-level simulation result to generate a comparison report for an analog value auto-comparison.
    Type: Application
    Filed: August 20, 2019
    Publication date: November 12, 2020
    Inventors: Lu Liao, Mei Wang, Yueping Li
  • Publication number: 20080146076
    Abstract: An all-in-one connecting base having a waterproof device includes a connecting base body, a waterproof shell and a waterproof device. At least one connecting port is set on the connecting base body. The waterproof shell is mounted outside of the connecting base body and covers the connecting ports. The waterproof device is set movably on the waterproof shell. Thereby, the all-in-one connecting base having a waterproof device is assembled. It is convenient to assemble or dismantle the waterproof shell to shorten maintenance and assembly times. Moreover, it is unnecessary to design a new waterproof loop for the different types of the connecting ports, which reduces purchasing costs and avoid costly purchasing of accessories, in order to reduce overall costs.
    Type: Application
    Filed: December 18, 2006
    Publication date: June 19, 2008
    Inventors: Hsiao-Ho Tan, Wen-Lu Liao
  • Patent number: 5617546
    Abstract: A removable CPU module for use in a data processing system. The CPU module includes at least one CPU having a first data width, and a first data bus of the same data width coupled to the CPU. A connector is coupled to the first data bus for connecting to a circuit board having a second data bus. The second data bus has a second data width which is different from the first data width. The CPU module is configured such that it is compatible with the second data bus. In one embodiment, the removable CPU module includes a third data bus coupled to the first data bus and the connector, which is a duplicate of and connected in parallel with the first data bus. The third data bus facilitates compatibility between the CPU module and the second data bus.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: April 1, 1997
    Assignee: Acer Incorporated
    Inventors: Kuo-Piao Shih, Wen-Lu Liao, Yann-Lang Chung
  • Patent number: 5609197
    Abstract: An apparatus for hanging curtains including a track defining a longitudinal sliding groove, a plurality of carrier slides each having a projecting block slidably inserted in the sliding groove of the track and a bottom slope with a round hole disposed outside the rack, a plurality of hooks respectively fastened to the round holes of the carrier slides, and a plurality of hanging loops respectively fastened to the curtain by stitches for hanging on the hooks.
    Type: Grant
    Filed: December 12, 1995
    Date of Patent: March 11, 1997
    Inventor: Shih-Lu Liao
  • Patent number: 5493655
    Abstract: A data processing system includes a first central processing unit (CPU), at least one expansion port into which additional CPUs may be inserted, and a system controller. Interrupt circuitry coupled to said first CPU, said at least one expansion port, and said system controller, is configured to allow the dam processing system to operate as a multi-processor system, only one of the first and additional CPUs communicating with the system controller at any one time.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: February 20, 1996
    Assignee: Acer Incorporated
    Inventors: Cheng-Lai Shen, Kuo-Piao Shih, Wen-Lu Liao