Patents by Inventor Lu Weifang

Lu Weifang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor light emitting device and manufacturing method of semiconductor light emitting device
    Patent number: 11462659
    Abstract: Provided is a semiconductor light emitting device including a growth substrate; a pillar-shaped semiconductor layer formed on the growth substrate; and a buried semiconductor layer formed to cover the pillar-shaped semiconductor layer, wherein the pillar-shaped semiconductor layer has an n-type nanowire layer formed at a center, an active layer formed on an outermore side than the n-type nanowire layer, a p-type semiconductor layer formed on an outermore side than the active layer and a tunnel junction layer formed on an outermore side than the p-type semiconductor layer, and wherein at least a part of the pillar-shaped semiconductor layer is provided with a removed region formed by removing from the buried semiconductor layer to a part of the tunnel junction layer.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: October 4, 2022
    Assignees: KOITO MANUFACTURING CO., LTD., MEIJO UNIVERSITY, TOYODA GOSEI CO., LTD.
    Inventors: Satoshi Kamiyama, Tetsuya Takeuchi, Motoaki Iwaya, Isamu Akasaki, Lu Weifang, Naoki Sone, Kazuyoshi Iida, Ryo Nakamura, Masaki Oya
  • SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR LIGHT EMITTING DEVICE
    Publication number: 20210074877
    Abstract: Provided is a semiconductor light emitting device including a growth substrate; a pillar-shaped semiconductor layer formed on the growth substrate; and a buried semiconductor layer formed to cover the pillar-shaped semiconductor layer, wherein the pillar-shaped semiconductor layer has an n-type nanowire layer formed at a center, an active layer formed on an outermore side than the n-type nanowire layer, a p-type semiconductor layer formed on an outermore side than the active layer and a tunnel junction layer formed on an outermore side than the p-type semiconductor layer, and wherein at least a part of the pillar-shaped semiconductor layer is provided with a removed region formed by removing from the buried semiconductor layer to a part of the tunnel junction layer.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 11, 2021
    Applicants: KOITO MANUFACTURING CO., LTD., MEIJO UNIVERSITY, TOYODA GOSEI CO., LTD.
    Inventors: Satoshi Kamiyama, Tetsuya Takeuchi, Motoaki Iwaya, Isamu Akasaki, Lu Weifang, Naoki Sone, Kazuyoshi Iida, Ryo Nakamura, Masaki Oya