Abstract: A clamping device for a shaft of a catheter can include a first member rotatably coupled to a second member. The first member can have an annular element defining a central lumen, the outer surface of the annular element having a non-circular cross-sectional profile, and the second member can define a bore into which the annular element extends, the bore having a non-circular cross-sectional profile. The device can move between a release state wherein the central lumen has a first diameter, and a clamped state wherein the central lumen has a second diameter less than the first diameter. When the clamping device is in the clamped state, the clamping device can engage an outer surface of a catheter shaft and when the clamping device is in the release state, the clamping device can be moved along a length of the catheter shaft.

Abstract: Gait, the walking pattern of individuals, is one of the most important biometrics modalities. Most of the existing gait recognition methods take silhouettes or articulated body models as the gait features. These methods suffer from degraded recognition performance when handling confounding variables, such as clothing, carrying and view angle. To remedy this issue, a novel AutoEncoder framework is presented to explicitly disentangle pose and appearance features from RGB imagery and a long short-term memory integration of pose features over time produces the gait feature.

Abstract: Gait, the walking pattern of individuals, is one of the most important biometrics modalities. Most of the existing gait recognition methods take silhouettes or articulated body models as the gait features. These methods suffer from degraded recognition performance when handling confounding variables, such as clothing, carrying and view angle. To remedy this issue, a novel AutoEncoder framework is presented to explicitly disentangle pose and appearance features from RGB imagery and a long short-term memory integration of pose features over time produces the gait feature.

Abstract: Systems and methods for performing domain adaptation include collecting a labeled source image having a view of an object. Viewpoints of the object in the source image are synthesized to generate view augmented source images. Photometrics of each of the viewpoints of the object are adjusted to generate lighting and view augmented source images. Features are extracted from each of the lighting and view augmented source images with a first feature extractor and from captured images captured by an image capture device with a second feature extractor. The extracted features are classified using domain adaptation with domain adversarial learning between extracted features of the captured images and extracted features of the lighting and view augmented source images. Labeled target images are displayed corresponding to each of the captured images including labels corresponding to classifications of the extracted features of the captured images.

Abstract: Systems and methods for vehicle surveillance include a camera for capturing target images of vehicles. An object recognition system is in communication with the camera, the object recognition system including a processor for executing a synthesizer module for generating a plurality of viewpoints of a vehicle depicted in a source image, and a domain adaptation module for performing domain adaptation between the viewpoints of the vehicle and the target images to classifying vehicles of the target images regardless of the viewpoint represented in the target images. A display is in communication with the object recognition system for displaying each of the target images with labels corresponding to the vehicles of the target images.

Abstract: A call recording test suite comprising a call recording test manager stored and operating on a network-connected computing device and a test database, wherein the call recording test manager connects over a network to a call recording system and verifies the existence of an expected call recording and stores the results of the query in the database, and a method for call recording testing for a specific call recording, and a method for call recording testing using a synthetic test call.

Abstract: Systems and methods for vehicle surveillance include a camera for capturing target images of vehicles. An object recognition system is in communication with the camera, the object recognition system including a processor for executing a synthesizer module for generating a plurality of viewpoints of a vehicle depicted in a source image, and a domain adaptation module for performing domain adaptation between the viewpoints of the vehicle and the target images to classifying vehicles of the target images regardless of the viewpoint represented in the target images. A display is in communication with the object recognition system for displaying each of the target images with labels corresponding to the vehicles of the target images.

Abstract: Systems and methods for performing domain adaptation include collecting a labeled source image having a view of an object. Viewpoints of the object in the source image are synthesized to generate view augmented source images. Photometrics of each of the viewpoints of the object are adjusted to generate lighting and view augmented source images. Features are extracted from each of the lighting and view augmented source images with a first feature extractor and from captured images captured by an image capture device with a second feature extractor. The extracted features are classified using domain adaptation with domain adversarial learning between extracted features of the captured images and extracted features of the lighting and view augmented source images. Labeled target images are displayed corresponding to each of the captured images including labels corresponding to classifications of the extracted features of the captured images.

Abstract: A call recording test suite comprising a call recording test manager stored and operating on a network-connected computing device and a test database, wherein the call recording test manager connects over a network to a call recording system and verifies the existence of an expected call recording and stores the results of the query in the database, and a method for call recording testing for a specific call recording, and a method for call recording testing using a synthetic test call.

Abstract: An integrated circuit having differently-sized features wherein the smaller features have a pitch multiplied relationship with the larger features, which are of such size as to be formed by conventional lithography.

Abstract: Methods for fabricating contacts of semiconductor device structures include forming a dielectric layer over a semiconductor substrate with active-device regions spaced at a first pitch, forming a first plurality of substantially in-line apertures over every second active-device region of the active-device regions, and forming a second plurality of substantially in-line apertures laterally offset from apertures of the first plurality over active-device regions over which apertures of the first plurality are not located. Methods for designing semiconductor device structures include forming at least two laterally offset sets of contacts over a substrate including active-device regions at a first pitch, the contacts being formed at a second pitch that is about twice the first pitch.

Abstract: An integrated circuit having differently-sized features wherein the smaller features have a pitch multiplied relationship with the larger features, which are of such size as to be formed by conventional lithography.

Abstract: A method lor integrated circuit fabrication is disclosed. A spacer pattern is provided including a plurality ot spacers in an array region of a partially-fabricated integrated circuit. Each spacer is at least partly defined by opposing open volumes extending along lengths of the spacers. A pattern is subsequently defined in a periphery region of the partially-fabricated integrated circuit. A consolidated pattern is formed by concurrently transferring the spacer pattern and the pattern in the periphery region into an underlying masking layer. The consolidated pattern is transferred to an underlying substrate.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.

Abstract: Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in the array region of the memory device. The widened lines allow for an increased margin of error when overlaying other features, such as landing pads, on the lines. The possibility of contacting and causing electrical shorts with adjacent lines is thus minimized. In addition, forming the portions of the lines in the periphery at an angle relative to the portions of the lines in the array regions allows the peripheral portions to be widened while also allowing multiple landing pads to be densely packed at the periphery.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.

Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern. Pitch multiplication is accomplished by patterning an amorphous carbon layer. Sidewall spacers are then formed on the amorphous carbon sidewalls which are then removed; the sidewall spacers defining the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is transferred to the BARC. The combined pattern is transferred to an underlying amorphous silicon layer. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, is then etched into the underlying substrate.

Abstract: Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in the array region of the memory device. The widened lines allow for an increased margin of error when overlaying other features, such as landing pads, on the lines. The possibility of contacting and causing electrical shorts with adjacent lines is thus minimized. In addition, forming the portions of the lines in the periphery at an angle relative to the portions of the lines in the array regions allows the peripheral portions to be widened while also allowing multiple landing pads to be densely packed at the periphery.

Abstract: Methods for fabricating contacts of semiconductor device structures include forming a dielectric layer over a semiconductor substrate with active-device regions spaced at a first pitch, forming a first plurality of substantially in-line apertures over every second active-device region of the active-device regions, and forming a second plurality of substantially in-line apertures laterally offset from apertures of the first plurality over active-device regions over which apertures of the first plurality are not located. Methods for designing semiconductor device structures include forming at least two laterally offset sets of contacts over a substrate including active-device regions at a first pitch, the contacts being formed at a second pitch that is about twice the first pitch.

Abstract: A semiconductor device structure includes staggered contacts to facilitate small pitches between active-device regions and conductive lines while minimizing one or both of misalignment during fabrication of the contacts and contact resistance between sections of the contacts. The contacts of one row communicate with every other active-device region and are staggered relative to the contacts of another row, which communicate with the remaining active-device regions. Each contact may include a relatively large contact plug with a relatively large upper surface to provide a relatively large amount of tolerance as a contact hole for an upper portion of the contact that is formed. The contact holes may be formed substantially simultaneously with trenches for conductive traces, such as bit lines, in a dual damascene process. Intermediate structures are also disclosed, as are methods for designing semiconductor device structures.