Abstract: Optoelectronic detectors (10) are arranged in matrix form. Integrated synchronous detectors (22) are connected to each column of the detectors (10). The detection is modulated and the detection signals demodulated by the synchronous detectors (22) making it possible to considerably improve the signal/noise (S/N) ratio of the apparatus.

Abstract: A reduced size solid state camera includes an array of detectors having reading circuits and electronic row and column scanning circuits utilizing CCD-type structures. Each of the column scanning circuits has an integrated part adjacent the detectors with a spacing equal to or smaller than that of the rows of detectors. The movement of the image to be photographed takes place in a direction perpendicular to the columns of detectors and may occur in two successive opposite directions. A scanning circuit for the row supplies a signal representing an image for each image movement direction. The circuitry includes a signal processor which sums up the signals corresponding to the same element of the image that has moved passed all of the detectors of a row.

Abstract: The structure comprises an electrically and thermally insulating polyimide layer, infrared sensors which are insulated from one another and have a polyvinyl pyroelectric film, whose face in contact with the polyimide is equipped with two comb-shaped electrodes, whose teeth are imbricated, the pyroelectric film being polarized in a plane parallel to the film and in directions parallel and perpendicular to the comb teeth, an integrated circuit having a face in contact with the polyimide layer, equipped with the reading circuit, and electric contact zones completely traverse the polyimide layer and connect the electrodes of each sensor to a reading circuit.

Abstract: A reference voltage generator comprising two MOS-type transistors T.sub.1 ' and T.sub.2 ' produced on the same substrate, the channels of these transistors having the respective lengths L.sub.1 and L.sub.2 and the respective widths Z.sub.1 and Z.sub.2, one of the transistors T.sub.2 ' having a channel, only one dimension of which is of the same order of magnitude as the corresponding dimension of the extension, relative to the source and drain of this transistor, of the space charge zone appearing round this source and this drain when the transistor is operating, the other dimension being large in relation to the corresponding dimension of said extension of the space charge zone, the other transistor T.sub.

Abstract: The charge-coupled device comprises at least one transfer electrode connected to a control line for transmitting a transfer signal. The circuit for measuring the charge stored in the device comprises a resistor inserted in the control line and a circuit for integrating the voltage appearing at the terminals of the resistor during application of the transfer signal.

Abstract: In a method and a device for storing analog signals in integrated circuit elements, the memory elements are constituted by field-effect transistors having a number of layers of different dielectrics between the gate and the doped semiconductor substrate of the transistor. After discrete sampling of the analog signal has been performed at N points, the N amplitudes corresponding to the N points are stored in N transistors in the form of a threshold voltage.

Abstract: In a method and a device for storing analog signals in integrated circuit elements, the memory elements are constituted by field-effect transistors having a number of layers of different dielectrics between the gate and the doped semiconductor substrate of the transistor. After discrete sampling of the analog signal has been performed at N points, the N amplitudes corresponding to the N points are stored in N transistors in the form of a threshold voltage.

Abstract: In a method and a device for multiplying analog signals in integrated circuit elements, the memory elements are constituted by field-effect transistors having a number of layers of different dielectrics between the gate and the doped semiconductor substrate of the transistor. After discrete sampling of the analog signal has been performed at N points, the N amplitudes corresponding to the N points are stored in N transistors in the form of a threshold voltage. A multiplication of two corresponding terms is performed by recording the signal which is proportional to one sample of a function in the memory of the multiple dielectric layer type and by applying a given voltage to the gate of the transistor so as to generate a signal which is a linear function of the threshold voltage which is in turn a linear function of the writing signal at the input of a multiplier circuit.