Abstract: An apparatus for assembling a photonic system comprising a photonic integrated circuit (PIC) includes: a support structure configured to support the PIC; and a rigid structure surrounding a hollow passage that extends to an opening at a distal end of the rigid structure. The rigid structure includes an optically transmissive portion configured to transmit at least about 50% of a received beam of ultraviolet light, and configured such that at least a portion of the ultraviolet light transmitted through the rigid structure is incident upon an edge surface of the PIC at an angle of incidence that is less than about 60 degrees.

Abstract: An apparatus for assembling a photonic system comprising a photonic integrated circuit (PIC) includes: a support structure configured to support the PIC; and a rigid structure surrounding a hollow passage that extends to an opening at a distal end of the rigid structure. The rigid structure includes an optically transmissive portion configured to transmit at least about 50% of a received beam of ultraviolet light, and configured such that at least a portion of the ultraviolet light transmitted through the rigid structure is incident upon an edge surface of the PIC at an angle of incidence that is less than about 60 degrees.

Abstract: A light-emitting sign comprising a light source for emitting light, in which the light-emitting sign may be thin (e.g., comparable to a conventional non-light-emitting sign) while creating a desired visual effect using the light emitted by the light source. This may be achieved, for example, by the light source being thin itself and/or by having an external device connected to the light-emitting sign and implementing certain functionalities (e.g., powering and/or controlling the light source).

Abstract: A light-emitting sign comprising a light source for emitting light, in which the light-emitting sign may be thin (e.g., comparable to a conventional non-light-emitting sign) while creating a desired visual effect using the light emitted by the light source. This may be achieved, for example, by the light source being thin itself and/or by having an external device connected to the light-emitting sign and implementing certain functionalities (e.g., powering and/or controlling the light source).

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: A metallic adhesion layer is formed on a last level metal plate exposed in an opening of a passivation layer. A Ni—Cu alloy in which the weight percentage of Ni is from about 50% to about 70% is deposited by sputtering onto the metallic adhesion layer to form an underbump metallic layer. Optionally, a wetting layer comprising Cu or Au may be deposited by sputtering. A C4 ball is applied to a surface of the underbump metallic layer comprising the Ni—Cu alloy or the wetting layer for C4 processing. The sputter deposition of the Ni—Cu alloy offers economic advantages relative to known methods in the art since the Ni—Cu alloy in the composition of the present invention is non-magnetic and easy to sputter, and the consumption of the inventive Ni—Cu alloy is limited during C4 processing.

Abstract: A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips.

Abstract: A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: A a metallic adhesion layer is formed on a last level metal plate exposed in an opening of a passivation layer. A Ni—Ti alloy in which the weight percentage of Ti is from about 6.5% to about 30% is deposited by sputtering onto the metallic adhesion layer to form an underbump metallic layer. A wetting layer comprising Cu or Ag or Au is deposited on top of Ni—Ti layer by sputtering. A C4 ball is applied to a surface of the wetting layer for C4 processing. The sputter deposition of the Ni—Ti alloy offers economic and performance advantages relative to known methods in the art since the Ni—Ti alloy in the composition of the present invention is non-magnetic and easy to sputter, and the consumption of the inventive Ni—Ti alloy is limited during C4 processing. Also, Sn in the solder reacts uniformly with both Ni and Ti and the consumption of Ni—Ti by Sn solder is less than that for pure Ni.

Abstract: A metallic adhesion layer is formed on a last level metal plate exposed in an opening of a passivation layer. A Ni—Cu alloy in which the weight percentage of Ni is from about 50% to about 70% is deposited by sputtering onto the metallic adhesion layer to form an underbump metallic layer. Optionally, a wetting layer comprising Cu or Au may be deposited by sputtering. A C4 ball is applied to a surface of the underbump metallic layer comprising the Ni—Cu alloy or the wetting layer for C4 processing. The sputter deposition of the Ni—Cu alloy offers economic advantages relative to known methods in the art since the Ni—Cu alloy in the composition of the present invention is non-magnetic and easy to sputter, and the consumption of the inventive Ni—Cu alloy is limited during C4 processing.

Abstract: A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: Disclosed is a new process that permits the transfer and reflow of solder features produced by Injection Molded Solder (IMS) from a mold plate to a solder receiving substrate without the use of flux. Several embodiments produce solder transfer and reflow separately or together and use either formic acid vapor or partial concentration of hydrogen, both in nitrogen, as the oxide reducing atmosphere. A final embodiment produces fluxless transfer and reflow in only nitrogen through the use of ultrasonic vibration between the solder filled mold plate and solder receiving substrate.

Abstract: Disclosed is a new process that permits the transfer and reflow of solder features produced by Injection Molded Solder (IMS) from a mold plate to a solder receiving substrate without the use of flux. Several embodiments produce solder transfer and reflow separately or together and use either formic acid vapor or partial concentration of hydrogen, both in nitrogen, as the oxide reducing atmosphere. A final embodiment produces fluxless transfer and reflow in only nitrogen through the use of ultrasonic vibration between the solder filled mold plate and solder receiving substrate.

Abstract: A method and apparatus for forming solder bumps by molten solder deposition into cavity arrays in a substrate immediately followed by solidification of molten solder such that precise replication of cavity volumes is consistently achieved in formed solder bump arrays. Various solder filling problems, such as those caused by surface tension and oxidation effects, are overcome by a combination of narrow molten Solder dispense slots and solidification of dispensed molten solder.