Patents by Inventor Luc Bisson

Luc Bisson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11055253
    Abstract: This disclosure provides a method that allows connector pins of a USB-C connector to be dynamically repurposed between low bandwidth USB2 traffic and high bandwidth USB3 traffic. USB-C devices can negotiate the use of these pins for a dynamic transition to another function or functions. The pins can be the four center connector pins of a USB-C connection, pins A6, A7, B6, B7, that are originally designated as USB 2.0 differential pairs Changing the function of the pins provides flexibility for communicating using USB-C connectors. For example, the disclosed method/device/system can be used to support high-resolution cameras and sensors in high-resolution virtual reality headsets via a single USB-C connection instead of a user having to connect multiple cables.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: July 6, 2021
    Assignee: Nvidia Corporation
    Inventors: Luc Bisson, Rambod Jacoby, Mark Overby
  • Publication number: 20200242070
    Abstract: This disclosure provides a method that allows connector pins of a USB-C connector to be dynamically repurposed between low bandwidth USB2 traffic and high bandwidth USB3 traffic. USB-C devices can negotiate the use of these pins for a dynamic transition to another function or functions. The pins can be the four center connector pins of a USB-C connection, pins A6, A7, B6, B7, that are originally designated as USB 2.0 differential pairs Changing the function of the pins provides flexibility for communicating using USB-C connectors. For example, the disclosed method/device/system can be used to support high-resolution cameras and sensors in high-resolution virtual reality headsets via a single USB-C connection instead of a user having to connect multiple cables.
    Type: Application
    Filed: October 17, 2018
    Publication date: July 30, 2020
    Inventors: Luc Bisson, Rambod Jacoby, Mark Overby
  • Patent number: 7864183
    Abstract: A graphics system includes a graphics memory. The graphics system includes a high performance mode and at least one power savings mode. A termination impedance and switching threshold of the graphics memory are selected based on an operating mode of the graphics system.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: January 4, 2011
    Assignee: NVIDIA Corporation
    Inventors: Bruce Lam, Luc Bisson, Gabriele Gorla, Tom Dewey, Andrew Bell
  • Publication number: 20080007552
    Abstract: One embodiment of a field changeable rendering system includes an output device interfaced to a motherboard, a fixed rendering device mounted to the motherboard for generating information to be output on said output device, a connector for attaching a field-changeable rendering card to the motherboard, said field-changeable rendering card capable of housing a discrete rendering device for generating information to be output on said output device and detection circuitry for detecting that a field-changeable rendering card housing a discrete rendering device is coupled to said connector and causing information from said field-changeable rendering card housing a discrete rendering device to be output on said output device. One advantage of the disclosed edge connector is that it is compatible with a plurality of graphics cards and systems, thereby enabling a computing device user to upgrade the existing device's graphics system.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 10, 2008
    Inventors: Michael Diamond, Luc Bisson, Ludger Mimberg, Joseph Walters
  • Patent number: 6987700
    Abstract: Methods and systems consistent with this invention write data to a memory. Such methods and systems may generate a clock signal, generate an intermediate clock signal from the clock signal using a clock tree buffer, delay the intermediate clock signal to form a data strobe signal, and write the data to the memory using the data strobe signal and a memory clock signal. Such methods and systems may also delay the intermediate clock signal to form the memory clock signal.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: January 17, 2006
    Assignee: Via Technologies, Inc.
    Inventors: Chen-Kuan Eric Hong, Luc Bisson
  • Publication number: 20050225549
    Abstract: One embodiment of a field changeable rendering system includes an output device interfaced to a motherboard, a fixed rendering device mounted to the motherboard for generating information to be output on said output device, a connector for attaching a field-changeable rendering card to the motherboard, said field-changeable rendering card capable of housing a discrete rendering device for generating information to be output on said output device and detection circuitry for detecting that a field-changeable rendering card housing a discrete rendering device is coupled to said connector and causing information from said field-changeable rendering card housing a discrete rendering device to be output on said output device. One advantage of the disclosed edge connector is that it is compatible with a plurality of graphics cards and systems, thereby enabling a computing device user to upgrade the existing device's graphics system.
    Type: Application
    Filed: April 9, 2004
    Publication date: October 13, 2005
    Inventors: Michael Diamond, Luc Bisson, Ludger Mimberg, Joseph Walters
  • Publication number: 20050041487
    Abstract: Methods and systems consistent with this invention write data to a memory. Such methods and systems may generate a clock signal, generate an intermediate clock signal from the clock signal using a clock tree buffer, delay the intermediate clock signal to form a data strobe signal, and write the data to the memory using the data strobe signal and a memory clock signal. Such methods and systems may also delay the intermediate clock signal to form the memory clock signal.
    Type: Application
    Filed: September 17, 2004
    Publication date: February 24, 2005
    Inventors: Chen-Kuan Hong, Luc Bisson