Abstract: A scalar processor associated with a vector processor reduces the quantization error for blocked data with a relatively small register size by predicting adjustments for shared scalars used in runtime quantization. The scalar processor provides a recommended scale value to the vector processor for scaling a block of data from a wide data type format to a narrow data type format. The scalar processor and the vector processor share a register at which the scalar processor stores the recommended scale value and from which the vector processor accesses the recommended scale value. The vector processor performs an operation to quantize at least a portion of the block of data by applying a scale value that is based on the recommended scale value.

Abstract: Embodiments herein describe storing unaligned data structures in local memory that are then loaded into cores. For example, the data structures may have a length that is not a power of 2 so that they do not align with the width (or the bandwidth of the local memories). A load unit in the core can receive multiple data chunks from the local memory and identify an unaligned data structure that spans across the data chunks. The data structures can then be stored in a register as an aligned data structure as the width of the register may match the length of the data structure.

Abstract: A method buffering packets in a packet switching network (FIG. 5) includes receiving a packet from the network; splitting the packet into a plurality of PDUs; stripping at least some of the PDUs over a plurality of memory banks; (18) retrieving the PDUs from the memory banks: and at least temporarily storing the retrieved PDUs in the sequence they are to be transmitted. An apparatus for implementing the method is also disclosed.

Abstract: The present invention provides a data-structure to store a search database and provides techniques to build this datastructure given a list of prefixes (P) and to search this database efficiently for a best matching prefix for an address D. The data-structure can be stored in standard memory (14), where values are stored associated with memory address locations. The data structure includes representations of addressable linked tables (FIG. 3b). The representations are related to a binary search trie (FIG. 1) and each linked table (T) has at least one entry. Entries in a table span more than one level of the binary search trie. The spanning feature relates to compression of a binary search trie into a finite number of levels (and hence tables). The finite number is less than the number of levels in the binary search trie. Hence the search algorithm is restricted to a finite, and predetermined number of search accesses to the tables to obtain a best-match result.

Abstract: A packet processing apparatus for processing data packets for use in a packet switched network includes means for receiving a packet, means for adding administrative information to a first data portion of the packet, the administrative information including at least an indication of at least one process to be applied to the first data portion, and a plurality of parallel pipelines, each pipeline comprising at least one processing unit, wherein the processing unit carries out the process on the first data portion indicated by the administrative information to provide a modified first data portion. According to a method, the tasks performed by each processing unit are organized into a plurality of functions such that there are substantially only function calls and no interfunction calls and that at the termination of each function called by the function call for one processing unit, the only context is a first data portion.

Abstract: The present invention provides a data-structure to store a search database and provides techniques to build this datastructure given a list of prefixes (P) and to search this database efficiently for a best matching prefix for an address D. The data-structure can be stored in standard memory (14), where values are stored associated with memory address locations. The data structure includes representations of addressable linked tables (FIG. 3b). The representations are related to a binary search trie (FIG. 1) and each linked table (T) has at least one entry. Entries in a table span more than one level of the binary search trie. The spanning feature relates to compression of a binary search trie into a finite number of levels (and hence tables). The finite number is less than the number of levels in the binary search trie. Hence the search algorithm is restricted to a finite, and predetermined number of search accesses to the tables to obtain a best-match result.

Abstract: A method buffering packets in a packet switching network (FIG. 5) includes receiving a packet from the network; splitting the packet into a plurality of PDUs; stripping at least some of the PDUs over a plurality of memory banks; (18) retrieving the PDUs from the memory banks: and at least temporarily storing the retrieved PDUs in the sequence they are to be transmitted. An apparatus for implementing the method is also disclosed.