Abstract: A computer implemented method, apparatus, and computer usable program code to collect event information in a bucket during execution of code to form collected event information. The collected event information is written in a trace each time a period of time passes. The time period is associated with the event information and the collected event information is cleared from the bucket each time the collected event information is written to the trace.

Abstract: A power level monitor and performance tracking tool are provided for correlating system performance with processor management events. When power management requires a change to the state of a microprocessor, software will be notified. Multiple layers of software may be notified, including a firmware level, an operating system, as well as applications. The performance tracking tool tracks the times of the power management events as well as their impact to the microprocessor performance. The performance tracking tool may then display or record the state changes to processor performance. These changes may be correlated against other system events to aid in determining system performance problems with respect to power management.

Abstract: In a multiprocessor system where each processor has the capacity to executing multiple hardware threads, a method, system, and program for monitoring the percentage usage of the total capacity of the physical processors is provided. A processor capacity monitor calculates a logical usage percentage of each of the available hardware threads. In addition, the processor capacity monitor calculates a physical usage percentage of each of the processors by each of the available threads. Then, the processor capacity monitor multiplies the logical usage percentage and physical usage percentage for each of the threads and sums the result. The summed result is divided by the number of physical processors to determine the percentage usage of the total capacity of the physical processors.

Abstract: A value in a counter on a processor is incremented for occurrences of a monitored event, providing a measured value for the event. The value of the counter register for a first thread is saved responsive to a switch from the first thread to a second thread. The value is saved in an accumulator in system memory. Then, responsive to a switch back to the first thread, the value for the first thread is restored from the accumulator. In this way, a counter may be read, and its value, for the first thread, for example, provides a coherent meaning relative to a previous value for the same thread, despite any intervening thread switches. Since the counter register may be read directly, in the user state, this provides a faster and more consistent means for updating performance counts.