Patents by Inventor Luca Bert

Luca Bert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140229941
    Abstract: A method and controller device for sharing computing resources in a virtualized environment having a plurality of virtual machines. The method includes assigning a portion of the computing resources to the plurality of virtual machines. The method also includes leasing by a first virtual machine at least a portion of the assigned computing resources of at least one second virtual machine. The first virtual machine leases computing resources from the at least one second virtual machine when the first virtual machine needs additional computing resources and at least a portion of the assigned computing resources of the at least one second virtual machine are not being used by the at least one second virtual machine.
    Type: Application
    Filed: February 14, 2013
    Publication date: August 14, 2014
    Applicant: LSI CORPORATION
    Inventors: Luca Bert, Parag R. Maharana
  • Publication number: 20140223094
    Abstract: A RAID controller includes a cache memory in which write cache blocks (WCBs) are protected by a RAID-5 (striping plus parity) scheme while read cache blocks (RCBs) are not protected in such a manner. If a received cache block is an RCB, the RAID controller stores it in the cache memory without storing any corresponding parity information. When a sufficient number of WCBs to constitute a full stripe have been received but not yet stored in the cache memory, the RAID controller computes a corresponding parity block and stores the RCBs and parity block in the cache memory as a single stripe.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: LSI CORPORATION
    Inventors: Anant Baderdinni, Horia Simionescu, Luca Bert
  • Publication number: 20140223071
    Abstract: A data storage system is provided that implements a command-push model that reduces latencies. The host system has access to a nonvolatile memory (NVM) device of the memory controller to allow the host system to push commands into a command queue located in the NVM device. The host system completes each IO without the need for intervention from the memory controller, thereby obviating the need for synchronization, or handshaking, between the host system and the memory controller. For write commands, the memory controller does not need to issue a completion interrupt to the host system upon completion of the command because the host system considers the write command completed at the time that the write command is pushed into the queue of the memory controller. The combination of all of these features results in a large reduction in overall latency.
    Type: Application
    Filed: February 4, 2013
    Publication date: August 7, 2014
    Applicant: LSI CORPORATION
    Inventors: Luca Bert, Anant Baderdinni, Horia Simionescu, Mark Ish
  • Publication number: 20140208005
    Abstract: A cache controller includes a cache memory distributed across multiple solid-state storage units in which cache line fill operations are applied sequentially in a defined manner and write operations are protected by a RAID-5 (striping plus parity) scheme upon a stripe reaching capacity. The cache store is responsive to data from a storage controller managing a primary data store. The cache store arranges the data differently based on the origin or type of data received at the cache interface. Line fill operations are placed in the cache memory without generating and storing corresponding parity information. When a sufficient number of write operations fill strips that constitute a full stripe are present in cache store, a corresponding parity strip is generated and stored in a strip location designated for storage of the parity information.
    Type: Application
    Filed: November 5, 2013
    Publication date: July 24, 2014
    Applicant: LSI Corporation
    Inventors: Horia Simionescu, Anant Baderdinni, Luca Bert
  • Publication number: 20140208024
    Abstract: A data storage system and methods for managing data to be transferred between a host and a data volume distributed across solid state storage modules are disclosed. A storage controller couples the host to the data volume and manages data transfers to and from the logical volume. The storage controller receives a set of parameters that define how an array of blocks and chunks of buffered data will be distributed across solid state storage modules. The storage controller receives and buffers data to be stored and transfers the same when the capacity of the buffered data will fill a set of arranged stripes in the defined array in a single write operation.
    Type: Application
    Filed: September 22, 2013
    Publication date: July 24, 2014
    Applicant: LSI Corporation
    Inventors: Horia Simionescu, Anant Baderdinni, Luca Bert
  • Publication number: 20140201462
    Abstract: A method and system for managing a cache for a host machine is disclosed. The method includes: indicating each cache line in the cache as being in a transitional meta-state when any virtual machine hosted on the host machine moves out of the host machine; each time a particular cache line is accessed, indicating that particular cache line as no longer in the transitional meta-state; and marking the cache lines still in the transitional meta-state as invalid when a virtual machine moves back to the host machine.
    Type: Application
    Filed: January 11, 2013
    Publication date: July 17, 2014
    Applicant: LSI CORPORATION
    Inventors: Parag R. Maharana, Luca Bert, Earl Cohen
  • Publication number: 20140173330
    Abstract: The invention provides for split brain detection and recovery in a DAS cluster data storage system through a secondary network interconnection, such as a SAS link, directly between the DAS controllers. In the event of a communication failure detected on the secondary network, the DAS controllers initiate communications over the primary network, such as an Ethernet used for clustering and failover operations, to diagnose the nature of the failure, which may include a crash of a data storage node or loss of a secondary network link. Once the nature of the failure has been determined, the DAS controllers continue to serve all I/O from the surviving nodes to honor high availability. When the failure has been remedied, the DAS controllers restore any local cache memory that has become stale and return to regular I/O operations.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Applicant: LSI CORPORATION
    Inventors: Sumanesh Samanta, Luca Bert, Sujan Biswas
  • Publication number: 20140143496
    Abstract: A method and system for self-sizing dynamic cache for virtualized environments is disclosed. The preferred embodiment self sizes unequal portions of the total amount of cache and allocates to a plurality of active virtualized machines (VM) according to VM requirements and administrative standards. As a new VM may emerge and request an amount of cache, the cache controller reclaims currently used cache from the active VM and reallocates the unequal portions of cache required by each VM. To ensure cache availability, a quick reclamation amount of cache is immediately available to each new VM as it makes the request begins operation. After reallocation, the newly created VM may rely on a guaranteed minimum quota of cache to ensure performance.
    Type: Application
    Filed: November 20, 2012
    Publication date: May 22, 2014
    Applicant: LSI CORPORATION
    Inventor: Luca Bert
  • Patent number: 8732396
    Abstract: A DAS system that implements RAID technology is provided in which an array of solid state disks (SSDs) that is external to the DAS controllers of the DAS system is used by the DAS controllers as WB cache memory for performing WB caching operations. Using the external SSD array as WB cache memory allows the DAS system to be fully cache coherent without significantly increasing the complexity of the DAS system and without increasing the amount of bandwidth that is utilized for performing caching operations. In addition, using the external SSD array as WB cache memory obviates the need to mirror DAS controllers.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: May 20, 2014
    Assignee: LSI Corporation
    Inventor: Luca Bert
  • Publication number: 20140068181
    Abstract: The invention provides an elastic or flexible SSD cache utilizing a hybrid RAID protocol combining RAID-0 protocol for read data and RAID-5 single parity protocol for write data in the same cache array. Read data may be stored in window sized allocations using RAID-0 protocol to avoid allocating an entire RAID stripe for read cache data. In the same SSD volume, dirty write data is stored in row allocations using RAID-5 protocol to provide single parity for the dirty write data. Read data is typically stored a window from the physical device having the largest number of available windows. Write data is stored in a row including the next available window in each arm, which decouples the window structure of the rows from the stripe configuration of the physical memory devices.
    Type: Application
    Filed: September 6, 2012
    Publication date: March 6, 2014
    Applicant: LSI CORPORATION
    Inventors: Debal K. Mridha, Luca Bert
  • Publication number: 20140025890
    Abstract: Methods and structure for improved flexibility in managing cache memory in a storage controller of a computing device on which multiple virtual machines (VMs) are operating in a VM computing environment. Embodiments hereof provide for the storage controller to receive configuration information from a VM management system coupled with the storage controller where the configuration information comprises information regarding each VM presently operating on the computing device. Based on the configuration information, the storage controller allocates and de-allocates segments of the cache memory of the storage controller for use by the various virtual machines presently operating on the computing device. The configuration information may comprise indicia of the number of VMs presently operating as well as performance metric threshold configuration information to allocate/de-allocate segments based on present performance of each virtual machine.
    Type: Application
    Filed: December 12, 2012
    Publication date: January 23, 2014
    Applicant: LSI Corporation
    Inventors: Luca Bert, Parag R. Maharana
  • Patent number: 8578146
    Abstract: One embodiment is a method for booting a bootable virtual storage appliance on a virtualized server platform. One such method comprises: providing a virtual storage appliance on a server platform, the virtual storage appliance configured to manage a disk array comprising a plurality of disks, and wherein at least one of the disks comprises a hidden boot partition having a boot console; powering up the server platform; loading boot code on the server platform; loading the boot console from the hidden boot partition; and the boot console loading boot components for a virtualization environment.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: November 5, 2013
    Assignee: LSI Corporation
    Inventor: Luca Bert
  • Publication number: 20130282950
    Abstract: A method for selectively placing cache data, comprising the steps of (A) determining a line temperature for a plurality of devices, (B) determining a device temperature for the plurality of devices, (C) calculating an entry temperature for the plurality of devices in response to the cache line temperature and the device temperature and (D) distributing a plurality of write operations across the plurality of devices such that thermal energy is distributed evenly over the plurality of devices.
    Type: Application
    Filed: April 24, 2012
    Publication date: October 24, 2013
    Inventors: Luca Bert, Mark Ish, Rajiv Ganth Rajaram
  • Publication number: 20130275672
    Abstract: The invention provides for SSD cache expansion by assigning all excess overprovisioned space (OP) above a level of advertised SSD memory to SSD cache. As additional SSD memory is needed to provide the advertised SSD memory, an offsetting portion of the OP is reassigned from excess overprovisioned space to the SSD cache. In this manner, the advertised SSD memory is maintained while continuously allocating all available excess OP to cache. The result is that all of the available SSD memory is allocated to cache, a portion to maintain the advertised SSD memory and the balance as excess OP allocated to cache. This eliminates idle OP in the SSD allocation.
    Type: Application
    Filed: June 27, 2012
    Publication date: October 17, 2013
    Applicant: LSI CORPORATION
    Inventor: Luca Bert
  • Patent number: 8539218
    Abstract: One embodiment is a method for installing a virtual storage appliance on a host server platform. One such method comprises: providing an installation package to a host server platform, the installation package comprising an installation script for installing an I/O virtual machine (IOVM), an IOVM boot console, and an IOVM management module; running the installation script to create a hidden boot partition on a boot disk and copy the IOVM boot console and the IOVM management module to the hidden boot partition; rebooting the host server platform; loading the IOVM boot console and the IOVM management module from the hidden boot partition; configuring a disk array via the IOVM management module; for each disk in the array, creating a hidden boot partition and replicating the IOVM boot console and the IOVM management module; and installing a virtual storage environment using the IOVM boot console as a storage driver.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: September 17, 2013
    Assignee: LSI Corporation
    Inventor: Luca Bert
  • Patent number: 8527698
    Abstract: A RAID system is provided in which the RAID controller of the system causes a predetermined number, N, of IO commands to be queued in a memory element, where N is a positive integer. After the N IO commands have been queued, the RAID controller writes N locks associated with the N IO commands in parallel to a service memory device. The RAID controller then writes N stripes of data and parity bits associated with the N IO commands to the PDs of the system to perform striping and parity distribution. If a catastrophic event, such as a power failure, occurs, the RAID controller reads the locks from the service memory device and causes parity to be reconstructed for the stripes associated with the locks. These features improve write performance while preventing the occurrence of data corruption caused by write holes.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: September 3, 2013
    Assignee: LSI Corporation
    Inventor: Luca Bert
  • Publication number: 20130219214
    Abstract: A RAID data storage system incorporates permanently empty blocks into each stripe, distributed among all the data storage devices, to accelerate rebuild time by reducing the number of blocks that need to be rebuilt in the event of a failure.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: LSI CORPORATION
    Inventors: Sumanesh Samanta, Luca Bert, Satadal Bhattacharjee
  • Publication number: 20130080679
    Abstract: The present invention is directed to a method for optimizing thermal management for a storage controller cache of a data storage system. The method allows for pending writes of a storage controller to be selectively provided to solid-state device (SSD) module(s) of the controller in a manner which allows operating temperatures of the SSD module(s) to be maintained within a thermal envelope.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 28, 2013
    Applicant: LSI CORPORATION
    Inventor: Luca Bert
  • Publication number: 20130080696
    Abstract: A multi-tiered system of data storage includes a plurality of data storage solutions. The data storage solutions are organized such that the each progressively faster, more expensive solution serves as a cache for the previous solution, and each solution includes a dedicated data block to store individual data sets, newly written in a plurality of write operations, for later migration to slower data storage solutions in a single write operation.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 28, 2013
    Applicant: LSI Corporation
    Inventor: Luca Bert
  • Publication number: 20130042064
    Abstract: The present disclosure is directed to a system for dynamically adaptive caching. The system includes a storage device having a physical capacity for storing data received from a host. The system may also include a control module for receiving data from the host and compressing the data to a compressed data size. Alternatively, the data may also be compressed by the storage device. The control module may be configured for determining an amount of available space on the storage device and also determining a reclaimed space, the reclaimed space being according to a difference between the size of the data received from the host and the compressed data size. The system may also include an interface module for presenting a logical capacity to the host. The logical capacity has a variable size and may include at least a portion of the reclaimed space.
    Type: Application
    Filed: August 3, 2012
    Publication date: February 14, 2013
    Applicant: LSI Corporation
    Inventors: Horia Simionescu, Mark Ish, Luca Bert, Robert Quinn, Earl T. Cohen, Timothy Canepa