Patents by Inventor Luca Ciccarelli

Luca Ciccarelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SWITCH BLOCK FOR FPGA ARCHITECTURES
    Publication number: 20070085563
    Abstract: A switch block for FPGA architectures combining hardware and software techniques in order to reduce both active and standby leakage power.
    Type: Application
    Filed: October 2, 2006
    Publication date: April 19, 2007
    Applicant: STMicroelectronics S.r.l.
    Inventors: Luca Ciccarelli, Andrea Lodi, Roberto Giansante, Luca Magagni, Roberto Canegallo, Roberto Guerrieri
  • Architecture for a connection block in reconfigurable gate arrays
    Patent number: 7193437
    Abstract: An optimized architecture to implement connections between logic blocks and routing lines in reconfigurable gate arrays including connection blocks to connect inputs and outputs of different logic elements by means of connection wires, each connection block including a single line of pass transistor switches; and a decoding stage to drive the pass transistor switch.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: March 20, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Cappelli, Luca Ciccarelli, Andrea Lodi, Mario Toma, Fabio Campi
  • Switch block and corresponding switch matrix, in particular for FPGA architectures
    Publication number: 20060103420
    Abstract: A switch block suitable to realize the connection between interconnection lines connected thereto of the type comprising at least a switching block connected to the interconnection lines and including at least a buffer stage in turn connected to a plurality of transistors. The switch block comprises a decoding stage inserted between a plurality of SRAM cells and respective control terminals of the plurality of transistors of the switching block.
    Type: Application
    Filed: August 30, 2005
    Publication date: May 18, 2006
    Inventors: Luca Ciccarelli, Carlo Chiesa, Andrea Lodi, Roberto Giansante, Mario Toma, Fabio Campi
  • Architecture for a connection block in reconfigurable gate arrays
    Publication number: 20040225980
    Abstract: An optimised architecture to implement connections between logic blocks and routing lines in reconfigurable gate arrays including connection blocks to connect inputs and outputs of different logic elements by means of connection wires, each connection block including a single line of pass transistor switches; and a decoding stage to drive the pass transistor switch.
    Type: Application
    Filed: February 13, 2004
    Publication date: November 11, 2004
    Applicant: STMicroelectronics S.r.l.
    Inventors: Andrea Cappelli, Luca Ciccarelli, Andrea Lodi, Mario Toma, Fabio Campi