Patents by Inventor Luca Gaetano AMARU

Luca Gaetano AMARU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140043060
    Abstract: A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=A*B+B*C+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a polarity of each being controlled by input A and a conduction being controlled by input B, or vice-versa, in opposite polarities, and that route either an input A or C from one side of the transmission gates to the output.
    Type: Application
    Filed: August 7, 2013
    Publication date: February 13, 2014
    Applicant: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
    Inventors: Luca Gaetano AMARU, Pierre-Emmanuel Julien Marc GAILLARDON, Giovanni DE MICHELI