Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

Abstract: A state machine for generating signals configured for generating different signals according to the current state of the machine. The state machine is configured to change state both as a function of an internal timer and as a function of signals representative of events external to the state machine.

Abstract: A control device of a driving circuit of a discharge lamp is described. The driving circuit comprises an half bridge with a high side and a low side switches and the control device comprises a first device configured to control the switching frequency of the half bridge and a second device configured to detect the saturation current condition of the choke or the over current condition by detecting, cycle by cycle, a signal representative of the current passing through the low side switch. The second device generate a signal to cause the turning off of the low side switch and the turning on of the high side switch when the saturation current or over current condition of the choke is detected.

Abstract: A control device of a driving circuit of a discharge lamp is described. The driving circuit comprises an half bridge with a high side and a low side switches and the control device comprises a first device configured to control the switching frequency of the half bridge and a second device configured to detect the saturation current condition of the choke or the over current condition by detecting, cycle by cycle, a signal representative of the current passing through the low side switch. The second device generate a signal to cause the turning off of the low side switch and the turning on of the high side switch when the saturation current or over current condition of the choke is detected.

Abstract: A driving method for a discharge lamp having two cathodes includes providing a supply input voltage for providing an alternating voltage at the terminals of the cathodes, monitoring a condition of each of the cathodes and measuring a first direct voltage signal of the waveform of the voltage of the lamp that develops when the lamp approaches an ageing condition, deactivating the alternating voltage when a variation of the first direct voltage signal occurs, and supplying a second direct voltage signal proportional to the supply input voltage for deactivating the alternating voltage when a variation of the first direct voltage signal occurs in relation to the second direct voltage signal.

Abstract: A control circuit controls a driving circuit of a discharge lamp. The driving circuit comprises a half bridge and a clock generator that determines the switching frequency of the half bridge. The control circuit comprises a regulator that regulates the value of the switching frequency when the value of the voltage across the lamp exceeds a threshold value.

Abstract: A state machine for generating signals configured for generating different signals according to the current state of the machine. The state machine is configured to change state both as a function of an internal timer and as a function of signals representative of events external to the state machine.

Abstract: The present invention refers to a driving device of a discharge lamp (10) having two cathodes. Said device comprises first means (1, 11) having a supply input voltage (Val) and suitable for providing an alternating voltage at the ends of the cathodes, second means (3) capable of monitoring a condition of each of said cathodes and suitable for measuring a first direct voltage signal (Vdc) of the waveform of the voltage of the lamp that develops when the lamp (10) approaches the ageing condition, third means (40) coupled to the second means (3) and suitable for deactivating the first means (11), fourth means (50) suitable for providing to the third means (40) a second direct voltage signal (Vdca) proportional in value to the supply voltage (Val). The third means (40) are suitable for deactivating the first means (11) when a predetermined variation of the first direct voltage signal (Vdc) occurs in relation to the second direct voltage signal (Vdca).

Abstract: A control circuit controls a driving circuit of a discharge lamp. The driving circuit comprises a half bridge and a clock generator that determines the switching frequency of the half bridge. The control circuit comprises a regulator that regulates the value of the switching frequency when the value of the voltage across the lamp exceeds a threshold value.

Abstract: A protection device protects a driving device of an electric motor with at least three phases and at least three windings and the driving device comprises a power stage suitable for driving directly said at least three windings. The driving device is suitable for actuating a motor brake operating phase and comprises detectors suitable for detecting the currents that run in the windings of the motor. The protection device comprises selectors suitable for selecting the currents having a single direction between said detected currents and a deactuator suitable for deactuating the power stage during said motor brake operating phase when the sum of the currents having a single direction is greater than a reference current.

Abstract: A protection device protects a driving device of an electric motor with at least three phases and at least three windings and the driving device comprises a power stage suitable for driving directly said at least three windings. The driving device is suitable for actuating a motor brake operating phase and comprises detectors suitable for detecting the currents that run in the windings of the motor. The protection device comprises selectors suitable for selecting the currents having a single direction between said detected currents and a deactuator suitable for deactuating the power stage during said motor brake operating phase when the sum of the currents having a single direction is greater than a reference current.