Abstract: Function approximation includes receiving a number value to be input to a function. The number value includes a first and second plurality of bits. A first approximation value of a function is determined using the first plurality of bits as an index to a first lookup table including a plurality of candidate first approximation values. A first correction coefficient is determined using the first plurality of bits as an index to a second lookup table including a plurality of candidate first correction coefficients. A second correction coefficient is determined by using the first plurality of bits as an index to a third lookup table including a plurality of candidate second correction coefficients. A second approximation value of the function is determined based on the first approximation value, the first correction coefficient, and the second plurality of bits.

Abstract: Correction of outliers in a data set includes receiving a first set of inputs of an input dataset requiring positive correction; and receiving a second set of inputs of the input dataset requiring negative correction. Conjunctive clauses with a predetermined number of terms that make all members in the second set of inputs false are identified to form a set of identified conjunctive clauses. Members from the first set of inputs that evaluate to true are collected for each conjunctive clause in the set of identified clauses. The set of identified conjunctive clauses are iterated through until all of the first set of inputs evaluates to true, and the conjunctive clauses are disjuncted to form a disjuncted expression. A correction circuit for the input dataset is generated based on the disjuncted expression.

Abstract: A multi-operation computer instruction is executed to obtain an intermediate result. The execution includes selecting digits of a plurality of digits of multiple values to be multiplied. A location defined to hold a digit is greater in size than the size of the digit and further defined to hold a carry digit. The digits are selected from a predefined group of digits of a plurality of predefined groups based on a selection control of the instruction. The digits selected are multiplied to obtain a plurality of results. At least one result may be shifted a preselected amount to obtain at least one shifted result. One or more results and any shifted results, at least, are added to obtain an intermediate result. Execution of the instruction is repeated for multiple other predefined groups providing a plurality of intermediate results used to obtain a product of multiplying the multiple values.

Abstract: A method, computer program product, and a computer system are disclosed for processing information using hardware instructions in a processor of a computer system by performing a hardware reduction instruction using an input to calculate at least one range reduction factor of the input; performing a hardware restoration instruction using the input to calculate at least one range restoration factor of the input; and performing a final fused multiply add (FMA) type of hardware instruction or a multiply (FM) hardware instruction by combining an approximation based on a value reduced by the at least one range reduction factor with the at least one range restoration factor.

Abstract: A method, computer program product, and a computer system are disclosed for processing information using hardware instructions in a processor of a computer system by performing a hardware reduction instruction using an input to calculate at least one range reduction factor of the input; performing a hardware restoration instruction using the input to calculate at least one range restoration factor of the input; and performing a final fused multiply add (FMA) type of hardware instruction or a multiply (FM) hardware instruction by combining an approximation based on a value reduced by the at least one range reduction factor with the at least one range restoration factor.

Abstract: A method, computer program product, and a computer system are disclosed for processing information using hardware instructions in a processor of a computer system by performing a hardware reduction instruction using an input to calculate at least one range reduction factor of the input; performing a hardware restoration instruction using the input to calculate at least one range restoration factor of the input; and performing a final fused multiply add (FMA) type of hardware instruction or a multiply (FM) hardware instruction by combining an approximation based on a value reduced by the at least one range reduction factor with the at least one range restoration factor.

Abstract: A method, computer program product, and a computer system are disclosed for processing information using hardware instructions in a processor of a computer system by performing a hardware reduction instruction using an input to calculate at least one range reduction factor of the input; performing a hardware restoration instruction using the input to calculate at least one range restoration factor of the input; and performing a final fused multiply add (FMA) type of hardware instruction or a multiply (FM) hardware instruction by combining an approximation based on a value reduced by the at least one range reduction factor with the at least one range restoration factor.