Abstract: Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal, a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, and a digital-to-analog converter coupled to the voltage-controlled oscillator where the control signal is generated based on an output of the digital-to-analog converter.

Abstract: Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include an adjustable current converter (ACC), coupled at an input terminal to a power source, operable to output a control signal (VC) at an output terminal. A first switch may be coupled to the ACC and to the VCO. The VCO, when in an “ON” state, receives the control signal and outputs a high frequency signal (VHF). A digital filter may be coupled to the VCO and operable to receive the VHF. Based on the VHF, the digital filter generates a data signal having a data value. The circuit may also include a digital-to-analog converter (DAC) operable to receive the data signal and, based on the data value, output an adjustment signal to the ACC. The ACC may adjust the control signal based on the adjustment signal received from the DAC.

Abstract: Devices, systems, and methods for locking a voltage controlled oscillator (VCO) at a high frequency may include use of a VCO and an integrator, which generates and outputs a control signal to the VCO, based on an inverting signal and a reference signal. The control signal locks the VCO to a high frequency signal (FH). A frequency divider is coupled to the VCO, receives FH from the VCO, divides FH by a factor “F”, and outputs a low frequency signal (FL). A switched capacitor resistor circuit (SCRC) is coupled to the frequency divider and the integrator. The SCRC receives FL from the frequency divider and generates the inverting signal. An integrating capacitor is coupled across an inverting and an output terminal of op-amp in the integrator. The output of the op-amp provides an integrator signal, which may be (optionally) filtered to produce the control signal.

Abstract: Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include an adjustable current converter (ACC), coupled at an input terminal to a power source, operable to output a control signal (VC) at an output terminal. A first switch may be coupled to the ACC and to the VCO. The VCO, when in an “ON” state, receives the control signal and outputs a high frequency signal (VHF). A digital filter may be coupled to the VCO and operable to receive the VHF. Based on the VHF, the digital filter generates a data signal having a data value. The circuit may also include a digital-to-analog converter (DAC) operable to receive the data signal and, based on the data value, output an adjustment signal to the ACC. The ACC may adjust the control signal based on the adjustment signal received from the DAC.

Abstract: Devices, systems, and methods for locking a voltage controlled oscillator (VCO) at a high frequency may include use of a VCO and an integrator, which generates and outputs a control signal to the VCO, based on an inverting signal and a reference signal. The control signal locks the VCO to a high frequency signal (FH). A frequency divider is coupled to the VCO, receives FH from the VCO, divides FH by a factor “F”, and outputs a low frequency signal (FL). A switched capacitor resistor circuit (SCRC) is coupled to the frequency divider and the integrator. The SCRC receives FL from the frequency divider and generates the inverting signal. An integrating capacitor is coupled across an inverting and an output terminal of op-amp in the integrator. The output of the op-amp provides an integrator signal, which may be (optionally) filtered to produce the control signal.

Abstract: A method for detecting rotation of a rotor of a multiple phase motor with bipolar drive is described, excluding a three-phase motor with bipolar drive with star connected coils or motor stator windings. The motor has at least a first and a second energizable motor stator winding. A voltage is sequentially and alternately sensed on the first and the second motor stator winding at or near the end of a period of a non-energised state thereof. An apparatus for detecting rotor speed is also provided.

Abstract: The present invention provides a method for detecting rotation of a rotor of a multiple phase motor with bipolar drive, excluding a three-phase motor with bipolar drive with star connected coils or motor stator windings, the motor comprising at least a first and a second energisable motor stator winding. The method comprises sequentially and alternately sensing a voltage on the first and the second motor stator winding during a substantially non-energised state thereof. The present invention also provides an apparatus for detecting rotor speed.

Abstract: A protection device is provided for protecting a switching device that is able to control a current through an inductive load which is subject to a supply voltage, by switching a first and a second terminal of the inductive load to the respective pole of the supply voltage. The switching device is under control of a switching control device. The switching control device operates based on a predetermined algorithm. The switching device also includes flyback body diodes. The protection device includes measuring means for measuring a voltage level on a terminal of the load, and decision means for making a decision on switching the first terminal of the load if the measured voltage level exceeds the supply voltage. The protection device also includes instructing means for instructing the switching control device based on the decision for switching a first terminal of the load.

Abstract: A protection device is provided for protecting a switching device that is able to control a current through an inductive load which is subject to a supply voltage, by switching a first and a second terminal of the inductive load to the respective pole of the supply voltage. The switching device is under control of a switching control device. The switching control device operates based on a predetermined algorithm. The switching device also includes flyback body diodes. The protection device includes measuring means for measuring a voltage level on a terminal of the load, and decision means for making a decision on switching the first terminal of the load if the measured voltage level exceeds the supply voltage. The protection device also includes instructing means for instructing the switching control device based on the decision for switching a first terminal of the load.

Abstract: An operational amplifier arrangement includes besides the two-stage operational amplifier, a third stage for tracking and holding the input offset of the first stage during an offset compensation phase which regularly interrupts the normal operation of the arrangement. To this purpose four switches are clocked, whereby the first stage is decoupled from the second stage during an offset compensation phase, whereby the feedback loop of the third stage is interrupted during normal mode, and whereby during the offset compensation phase the input is decoupled from the arrangement, while both input terminals are shorted. A Miller capacitor across the second stage prevents the output from drifting during the offset compensation mode.