Abstract: A processor can determine that a set of the memory cells is controlled by signals from a first portal. The processor can determine a function of a second portal in a relationship between the first portal and the second portal. The processor can cause, in response to a determination that the function of the second portal is a specific function, a memory control circuitry to be configured so that a subset, of the set, is controlled also by signals from the second portal. The processor can determine a function of a third portal in a relationship between the first portal and the third portal. The processor can cause, in response to a determination that the function of the third portal is the specific function, the memory control circuitry to be configured so that the subset, of the set, is controlled also by signals from the third portal.

Abstract: A processor can determine that a set of the memory cells is controlled by signals from a first portal. The processor can determine a function of a second portal in a relationship between the first portal and the second portal. The processor can cause, in response to a determination that the function of the second portal is a specific function, a memory control circuitry to be configured so that a subset, of the set, is controlled also by signals from the second portal. The processor can determine a function of a third portal in a relationship between the first portal and the third portal. The processor can cause, in response to a determination that the function of the third portal is the specific function, the memory control circuitry to be configured so that the subset, of the set, is controlled also by signals from the third portal.

Abstract: Some external users in a public on-line community may post excessive numbers of items, causing annoyance to others and unnecessary loading on database resources. A robust moderation framework enables an individual community moderator or admin to specify a set of rules and actions to mitigate this problem. Scalable, performant rate limiting rules employ windowed counters, separately for each rule, with the counters maintained in cache memory resources outside the main database.

Abstract: A processor can determine that a set of the memory cells is controlled by signals from a first portal. The processor can determine a function of a second portal in a relationship between the first portal and the second portal. The processor can cause, in response to a determination that the function of the second portal is a specific function, a memory control circuitry to be configured so that a subset, of the set, is controlled also by signals from the second portal. The processor can determine a function of a third portal in a relationship between the first portal and the third portal. The processor can cause, in response to a determination that the function of the third portal is the specific function, the memory control circuitry to be configured so that the subset, of the set, is controlled also by signals from the third portal.

Abstract: A processor can determine that a set of the memory cells is controlled by signals from a first portal. The processor can determine a function of a second portal in a relationship between the first portal and the second portal. The processor can cause, in response to a determination that the function of the second portal is a specific function, a memory control circuitry to be configured so that a subset, of the set, is controlled also by signals from the second portal. The processor can determine a function of a third portal in a relationship between the first portal and the third portal. The processor can cause, in response to a determination that the function of the third portal is the specific function, the memory control circuitry to be configured so that the subset, of the set, is controlled also by signals from the third portal.

Abstract: Some external users in a public on-line community may post excessive numbers of items, causing annoyance to others and unnecessary loading on database resources. A robust moderation framework enables an individual community moderator or admin to specify a set of rules and actions to mitigate this problem. Scalable, performant rate limiting rules employ windowed counters, separately for each rule, with the counters maintained in cache memory resources outside the main database.

Abstract: Some external users in a public on-line community may post excessive numbers of items, causing annoyance to others and unnecessary loading on database resources. A robust moderation framework enables an individual community moderator or admin to specify a set of rules and actions to mitigate this problem. Scalable, performant rate limiting rules employ windowed counters, separately for each rule, with the counters maintained in cache memory resources outside the main database.

Abstract: Some external users in a public on-line community may post excessive numbers of items, causing annoyance to others and unnecessary loading on database resources. A robust moderation framework enables an individual community moderator or admin to specify a set of rules and actions to mitigate this problem. Scalable, performant rate limiting rules employ windowed counters, separately for each rule, with the counters maintained in cache memory resources outside the main database.