Abstract: A lateral injection VCSEL comprises upper and lower mirrors forming a cavity resonator, an active region disposed in the resonator, high conductivity upper and lower contact layers located on opposite sides of the active region, upper and lower electrodes disposed on the upper and lower contact layers, respectively, and on laterally opposite sides of the upper mirror, and a current guide structure including an apertured high resistivity layer for constraining current to flow in a relatively narrow channel through the active region, characterized in that a portion of the lower contact layer that extends under the top electrode has relatively high resistivity. This feature of our invention serves two purposes. First, it suppresses current flow in parallel paths and, therefore, tends to make the current density distribution in the aperture more favorable for the fundamental mode. Second, it reduces parasitic capacitance.

Abstract: An integrated semiconductor device is formed from two fabricated semiconductor devices each having a substrate by placing an etch-resist on the substrate of the one semiconductor device, by bonding the conductors of one of the fabricated semiconductor devices to the conductors of the other fabricated semiconductor device, flowing an uncured cement (e.g. epoxy) between the etch-resist and the other substrate, allowing the cement to solidify, and removing the substrate from the one of the semiconductor devices. More specifically, a hybrid semiconductor device is formed from a GaAs/AlGaAs multiple quantum well modulator having a substrate and an IC chip having a substrate by placing an etch resist on the modulator substrate, bonding the conductors of the modulator to the conductors of the chip, wicking an uncured epoxy between the modulators and the chip, allowing the epoxy to cure, and removing the substrate from the modulator.

Abstract: A VCSEL comprises separate current and optical guides that provide unique forms of drive current and transverse mode confinement, respectively. In one embodiment, the optical guide comprises an intracavity high refractive index mesa disposed transverse to the cavity resonator axis and a multi-layered dielectric (i.e., non-epitaxial) mirror overlaying the mesa. In another embodiment, the current guide comprises an annular first electrode which laterally surrounds the mesa but has an inside diameter which is greater than that of an ion-implantation-defined current aperture. The current guide causes current to flow laterally from the first electrode along a first path segment which is essentially perpendicular to the resonator axis, then vertically from the first segment along a second path segment essentially parallel to that axis, and finally through the current aperture and the active region to a second electrode.

Abstract: An integrated semiconductor device is formed from two fabricated semiconductor devices each having a substrate by placing an etch-resist on the substrate of the one semiconductor device, by bonding the conductors of one of the fabricated semiconductor devices to the conductors of the other fabricated semiconductor device, flowing an uncured cement (e.g. epoxy) between the etch-resist and the other substrate, allowing the cement to solidify, and removing the substrate from the one of the semiconductor devices. More specifically, a hybrid semiconductor device is formed from a GaAs/AlGaAs multiple quantum well modulator having a substrate and an IC chip having a substrate by placing an etch resist on the modulator substrate, bonding the conductors of the modulator to the conductors of the chip, wicking an uncured epoxy between the modulators and the chip, allowing the epoxy to cure, and removing the substrate from the modulator.

Abstract: A method for thermocompression bonding structures together including structures having different coefficients of thermal expansion, for example, thermocompression bonding optical diode arrays or other semiconductor structures to silicon substrates to form electronic or optoelectronic devices. The method includes aligning and contacting the structures to be interconnected, thermocompressing the structures via their contact pad elements at a bonding temperature, establishing an encapsulation temperature, applying an encapsulant material between the bonded structures, and curing the encapsulant material at the encapsulation temperature. Conventional bonding processes, which treat encapsulation as a separate step apart from bonding processes, melt the bonded assembly together and include at least one thermal cycle in which the bonded assembly is cooled to room temperature and then is re-heated to the encapsulation temperature before applying the encapsulant material.

Abstract: Each microminiature contact pad included in a dense array of pads on an electronic component contains a relatively thick layer of solder. The layer is treated to form a relatively thin brittle protective layer on the surface of the solder. The structure is then brought into contact with a contact pad in a mating array of pads on another component in a thermo-compression bonding step carried out below the melting point of the solder. In that step, the brittle layer is fractured. As a result, solid-state diffusion of conductive material occurs through fissures in the fractured layer, thereby to provide an electrical connection between mating pads on the two components.

Abstract: Solder bonding of first and second contact pad arrays is accomplished by forming contact structures, such as posts with vertical or tapered sides, on the contact pads of the first array and solder bumps on the second array. The respective contact structures should have an average cross-sectional area that is less than the average cross-sectional area of the corresponding solder bumps. The contact structures and solder bumps are then bonded by a bonding process at a temperature and pressure where the solder bumps deform and envelop at least a portion of the respective contact structures. It is possible to employ the contact structures as a compression stop during the bonding process. The temperature should be below the melting points of the contact structures. In this manner, solder bump spreading can be reduced during bonding which correspondingly reduces electrical shorting of adjacent formed interconnect bonds.