Patents by Inventor Luciano Mule'Stagno
Luciano Mule'Stagno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250002122Abstract: A floating offshore structure is described. The floating offshore structure includes at least one floating platform module having a threefold symmetry. The floating platform module includes a set of buoyant prismatic submodules. Each buoyant prismatic submodule includes a core including a material having a density less than the water density, and a reinforcement shell surrounding the core of the buoyant prismatic submodule along its periphery defined by a top base face, a bottom base face, and side faces of the buoyant prismatic submodules. The buoyant prismatic submodules are attached to each other so as to form a threefold symmetrical shape of the floating platform module.Type: ApplicationFiled: October 2, 2022Publication date: January 2, 2025Inventor: Luciano MULE STAGNO
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Patent number: 7201800Abstract: A process for imparting controlled oxygen precipitation behavior to a single crystal silicon wafer. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon, and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing, such as an epitaxial deposition process, while maintaining the ability to dissolve any grown-in nucleation centers.Type: GrantFiled: October 12, 2004Date of Patent: April 10, 2007Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst
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Patent number: 7097718Abstract: Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated intrinsic point defects on the substrate surface upon which the epitaxial layer is deposited.Type: GrantFiled: May 20, 2003Date of Patent: August 29, 2006Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
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Publication number: 20050048247Abstract: A process for imparting controlled oxygen precipitation behavior to a single crystal silicon wafer. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon, and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing, such as an epitaxial deposition process, while maintaining the ability to dissolve any grown-in nucleation centers.Type: ApplicationFiled: October 12, 2004Publication date: March 3, 2005Inventors: Luciano Mule'Stagno, Jeffrey Libbert, Richard Phillips, Milind Kulkarni, Mohsen Banan, Stephen Brunkhorst
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Silicon wafers with stabilized oxygen precipitate nucleation centers and process for making the same
Patent number: 6808781Abstract: A silicon wafer having a controlled oxygen precipitation behavior such that a denuded zone extending inward from the front surface and oxygen precipitates in the wafer bulk sufficient for intrinsic gettering purposes are ultimately formed. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing such as an epitaxial deposition process while maintaining the ability to dissolve any grown-in nucleation centers.Type: GrantFiled: December 23, 2002Date of Patent: October 26, 2004Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst -
Publication number: 20030205191Abstract: Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated intrinsic point defects on the substrate surface upon which the epitaxial layer is deposited.Type: ApplicationFiled: May 20, 2003Publication date: November 6, 2003Applicant: MEMC Electronic Materials, Inc.Inventors: Luciano Mule ' Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
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Patent number: 6638357Abstract: A method for revealing agglomerated intrinsic point defect. The method comprising coating a sample with a metal capable of decorating agglomerated intrinsic point defects, heat-treating the coated sample to decorate any agglomerated intrinsic point defects, cooling the sample, etching the surface of the cooled sample without delineating the decorated agglomerated intrinsic point defects and etching the etched surface with a delineating etchant to reveal the decorated intrinsic point defects.Type: GrantFiled: December 30, 1999Date of Patent: October 28, 2003Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Robert J. Falster
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Publication number: 20030196587Abstract: The present invention relates to a process for growing a single crystal silicon ingot, which contains an axially symmetric region having a predominant intrinsic point defect and which is substantially free of agglomerated intrinsic point defects in that region. The process comprising cooling the ingot from the temperature of solidification to a temperature of less than 800° C. and, as part of said cooling step, quench cooling a region of the constant diameter portion of the ingot having a predominant intrinsic point defect through the temperature of nucleation for the agglomerated intrinsic point defects for the intrinsic point defects which predominate in the region.Type: ApplicationFiled: May 6, 2003Publication date: October 23, 2003Applicant: MEMC Electronic Materials, Inc.Inventors: Kirk D. McCallum, W. Brock Alexander, Mohsen Banan, Robert J. Falster, Joseph C. Holzer, Bayard K. Johnson, Chang Bum Kim, Steven L. Kimbel, Zheng Lu, Paolo Mutti, Vladimir V. Voronkov, Luciano Mule'Stagno, Jeffrey L. Libbert
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Patent number: 6635587Abstract: A process for heat treating a silicon wafer to dissolve B-type agglomerated interstitial defects present therein. The process includes heating the silicon wafer at a temperature for a time sufficient to dissolve B-defects, the wafer being heated to said temperature at a rate sufficient to prevent B-defects from becoming stabilized such that these defects are rendered incapable of being dissolved.Type: GrantFiled: September 14, 2000Date of Patent: October 21, 2003Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Joseph C. Holzer
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Publication number: 20030136961Abstract: A silicon wafer having a controlled oxygen precipitation behavior such that a denuded zone extending inward from the front surface and oxygen precipitates in the wafer bulk sufficient for intrinsic gettering purposes are ultimately formed. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing such as an epitaxial deposition process while maintaining the ability to dissolve any grown-in nucleation centers.Type: ApplicationFiled: December 23, 2002Publication date: July 24, 2003Applicant: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst
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Patent number: 6565649Abstract: The present invention is directed to an epitaxial wafer comprising a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated silicon self-interstitial defects on the substrate surface upon which the epitaxial layer is deposited.Type: GrantFiled: June 5, 2001Date of Patent: May 20, 2003Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule′Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
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Publication number: 20020084451Abstract: The present invention is directed to an epitaxial silicon wafer, as well as to a process for the preparation thereof, wherein the substrate wafer is highly P-doped, has silicon lattice vacancies as the predominant intrinsic point defect and is substantially free of oxidation induced stacking faults and the epitaxial silicon layer grown on the substrate wafer is substantially free of grown in oxidation induced stacking faults.Type: ApplicationFiled: November 7, 2001Publication date: July 4, 2002Inventors: Thomas C. Mohr, Luciano Mule' Stagno, Lu Fei, Mohsen Banan, Antonella Brianza
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Patent number: 6391662Abstract: A process for revealing agglomerated intrinsic point defects in a single crystal silicon sample. The process includes heat-treating the single crystal silicon sample, cooling the heat-treated sample and then coating a surface of the cooled sample with a composition containing a metal which is capable of decorating agglomerated intrinsic point defects. The coated sample is then heat-treated in an inert atmosphere at a temperature and for a time sufficient to diffuse the metal into the sample. A non-defect delineating etch is performed, followed by a defect delineating etch to reveal the decorated agglomerated intrinsic point defects.Type: GrantFiled: September 14, 2000Date of Patent: May 21, 2002Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule′Stagno, Robert J. Falster
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Publication number: 20020007779Abstract: The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects, and a process for the preparation thereof. The process for growing the single crystal silicon ingot comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C., and (iii) a cooling rate of the crystal from a solidification temperature to about 1,050° C., in order to cause the formation of an axially symmetrical segment which is substantially free of agglomerated intrinsic point defects.Type: ApplicationFiled: December 30, 1999Publication date: January 24, 2002Inventors: LUCIANO MULE'STAGNO, ROBERT FALSTER
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Publication number: 20010039916Abstract: The present invention is directed to a set of epitaxial silicon wafers assembled in a wafer cassette, boat or other wafer carrier. Each wafer comprises a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated silicon self-interstitial defects on the substrate surface upon which the epitaxial layer is deposited.Type: ApplicationFiled: June 5, 2001Publication date: November 15, 2001Inventors: Luciano Mule' Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Falster J. Falster
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Patent number: 6284039Abstract: The present invention is directed to a set of epitaxial silicon wafers assembled in a wafer cassette, boat or other wafer carrier. Each wafer comprises a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated silicon self-interstitial defects on the substrate surface upon which the epitaxial layer is deposited.Type: GrantFiled: October 13, 1999Date of Patent: September 4, 2001Assignee: MEMC Electronic Materials, Inc.Inventors: Luciano Mule'Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster