Abstract: A dual band mixer has a common node for at least one radio frequency input and an intermediate frequency output. The dual band mixer also has a first transistor with a gate coupled to a first local oscillator input and a drain coupled to the common node, and a second transistor with a gate coupled to a second local oscillator input and a drain coupled to the common node. Interconnection circuitry turns off the second transistor when the first local oscillator input signal is applied to the first transistor, and turns off the first transistor when the second local oscillator input signal is applied to the second transistor.

Abstract: A dual band mixer has a common node for at least one radio frequency input and an intermediate frequency output. The dual band mixer also has a first transistor with a gate coupled to a first local oscillator input and a drain coupled to the common node, and a second transistor with a gate coupled to a second local oscillator input and a drain coupled to the common node. Interconnection circuitry turns off the second transistor when the first local oscillator input signal is applied to the first transistor, and turns off the first transistor when the second local oscillator input signal is applied to the second transistor.

Abstract: A dual band mixer has a common node for at least one radio frequency input and an intermediate frequency output. The dual band mixer also has a first transistor with a gate coupled to a first local oscillator input and a drain coupled to the common node, and a second transistor with a gate coupled to a second local oscillator input and a drain coupled to the common node. Interconnection circuitry turns off the second transistor when the first local oscillator input signal is applied to the first transistor, and turns off the first transistor when the second local oscillator input signal is applied to the second transistor.

Abstract: In one aspect, a bias circuit includes a rectifier, a negative bias level setter, and a negative bias extractor. The rectifier has a rectifier input and a rectifier output. The rectifier is configured to produce at the rectifier output a negative rectified voltage signal from an alternating input signal applied at the rectifier input. The negative bias level setter couples to the rectifier output and provides a path for current establishing the negative rectified voltage signal produced at the rectifier output. The negative bias extractor has an extractor output and an extractor input coupled to the rectifier output. The negative bias extractor is configured to produce at the extractor output a substantially constant negative bias signal from the negative rectified voltage signal produced at the rectifier output.