Patents by Inventor Ludmil N. Nikolov
Ludmil N. Nikolov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250110543Abstract: Systems and methods described herein correspond to supply harvesting operations. Power management circuitry may receive a supply voltage from other power management circuitry. This supply voltage may be a harvested supply from the other power management circuitry. Moreover, some of the power management circuitry may be operated as controller power management circuitry to supply the supply voltage via one or more rails and some of the power management circuitry may be operated as leaf power management circuitry to harvest the supply voltage from the one or more rails. Leaf power management circuitry may exclude a regulator, enabling that leaf power management circuitry to be entered into a lower power mode than previously enabled when the regulator was included.Type: ApplicationFiled: September 29, 2023Publication date: April 3, 2025Inventors: Nathan F Hanagami, Maryam Mortazavi, Ruopeng Wang, Ludmil N Nikolov, Floyd L Dankert, Enrico Zanetti, Jianbao Wang, Kiranjit Dhaliwal
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Publication number: 20240241571Abstract: A power delivery system included in a computer system uses multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. An embodiment of the power delivery system includes an input power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.Type: ApplicationFiled: March 29, 2024Publication date: July 18, 2024Inventors: Shawn Searles, Sanjay Pant, Ludmil N. Nikolov, Tiago Filipe Galhoz Patrao, Enrico Zanetti, Hao Zhou, Vincenzo Bisogno
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Patent number: 11983063Abstract: A power delivery system included in a computer system using multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. The power delivery system includes a step-down power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.Type: GrantFiled: August 31, 2022Date of Patent: May 14, 2024Assignee: Apple Inc.Inventors: Shawn Searles, Sanjay Pant, Ludmil N. Nikolov, Tiago Filipe Galhoz Patrao, Enrico Zanetti, Hao Zhou, Vincenzo Bisogno
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Publication number: 20240077932Abstract: The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.Type: ApplicationFiled: March 16, 2023Publication date: March 7, 2024Applicant: Apple Inc.Inventors: Talbott M. Houk, Wenxun Huang, Nikola Jovanovic, Floyd L. Dankert, Sanjay Pant, Alessandro Molari, Siarhei Meliukh, Nicola Florio, Ludmil N. Nikolov, Nathan F. Hanagami, Hartmut Sturm, Di Zhao, Chad L. Olson, John J. Sullivan, Seyedeh Maryam Mortazavi Zanjani, Tristan R. Hudson, Jay B. Fletcher, Jonathan A. Dutra
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Publication number: 20240069621Abstract: A power delivery system included in a computer system using multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. The power delivery system includes a step-down power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Inventors: Shawn Searles, Sanjay Pant, Ludmil N. Nikolov, Tiago Filipe Galhoz Patrao, Enrico Zanetti, Hao Zhou, Vincenzo Bisogno
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Patent number: 11128300Abstract: A level shifter circuit with an intermediate power domain and method for operating the same is disclosed. The level shifter circuit includes an input circuit, an output circuit, and an intermediate circuit. The input circuit is coupled to receive an input signal from a first voltage domain operating according to a first supply voltage, and generates a first intermediate signal. The intermediate circuit receives the first intermediate signal and generates a second intermediate signal. The output circuit receives the intermediate signal and provides an output signal into a second voltage domain operating at a second supply voltage different from the first. A voltage multiplexer is configured to provide one of the first or second supply voltages to the intermediate circuit depending on a state of the input signal.Type: GrantFiled: March 16, 2020Date of Patent: September 21, 2021Assignee: Apple Inc.Inventors: Nathan F. Hanagami, Hao Zhou, Jianbao Wang, Ruopeng Wang, Ludmil N. Nikolov
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Publication number: 20210288648Abstract: A level shifter circuit with an intermediate power domain and method for operating the same is disclosed. The level shifter circuit includes an input circuit, an output circuit, and an intermediate circuit. The input circuit is coupled to receive an input signal from a first voltage domain operating according to a first supply voltage, and generates a first intermediate signal. The intermediate circuit receives the first intermediate signal and generates a second intermediate signal. The output circuit receives the intermediate signal and provides an output signal into a second voltage domain operating at a second supply voltage different from the first. A voltage multiplexer is configured to provide one of the first or second supply voltages to the intermediate circuit depending on a state of the input signal.Type: ApplicationFiled: March 16, 2020Publication date: September 16, 2021Inventors: Nathan F. Hanagami, Hao Zhou, Jianbao Wang, Ruopeng Wang, Ludmil N. Nikolov
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Patent number: 6791394Abstract: Power supply sequencing systems and methods are disclosed. In one embodiment, a programmable charge pump supplies a programmable current source, which drives an external NFET that controls whether power is supplied to a device or a portion of circuitry. The maximum voltage and the turn-on ramp rate supplied to the NFET are programmable and, therefore, the NFET can be operated safely within its rated limits without requiring external protection devices. If a high-voltage output terminal is not required to drive an external NFET, the output terminal, in accordance with another embodiment, may be configured to function as an open drain logic output terminal.Type: GrantFiled: October 10, 2002Date of Patent: September 14, 2004Assignee: Lattice Semiconductor CorporationInventors: Frederic N. F. Deboes, Ludmil N. Nikolov, Hans W. Klein, Geoffrey R. Richard
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Publication number: 20040070998Abstract: Power supply sequencing systems and methods are disclosed. In one embodiment, a programmable charge pump supplies a programmable current source, which drives an external NFET that controls whether power is supplied to a device or a portion of circuitry. The maximum voltage and the turn-on ramp rate supplied to the NFET are programmable and, therefore, the NFET can be operated safely within its rated limits without requiring external protection devices. If a high-voltage output terminal is not required to drive an external NFET, the output terminal, in accordance with another embodiment, may be configured to function as an open drain logic output terminal.Type: ApplicationFiled: October 10, 2002Publication date: April 15, 2004Inventors: Frederic N.F. Deboes, Ludmil N. Nikolov, Hans W. Klein, Geoffrey R. Rickard