Patents by Inventor Ludovic Dupre
Ludovic Dupre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240372043Abstract: A method for producing a photoemitting or photoreceiving diode includes producing, on a first substrate, first and second semiconductor layers with opposite dopings, and a third intrinsic semiconductor layer; etching trenches surrounding remaining portions of the second and third layers and of a first part of the first layer; and producing, in the trenches, a dielectric spacer covering side walls of said remaining portions. The method also includes etching to extend the trenches as far as the first substrate; laterally etching a part of the dielectric spacer, exposing contact surfaces of the second part of the first layer; and producing, in the trenches, a first electrode in contact with the contact surfaces of the second part of the first layer and with lateral flanks of the second part of the first layer.Type: ApplicationFiled: July 17, 2024Publication date: November 7, 2024Applicant: Lumileds LLCInventors: Ludovic Dupre, Helene Fournier, Franck Henry
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Publication number: 20240332437Abstract: A method for manufacturing an optoelectronic device comprising a substrate and wire diodes having an h:d spacing aspect ratio that is at least equal to 1, the method comprising a step of producing a conductive thin film by directional physical vapour deposition, the substrate experiences a periodic rotational movement and a periodic oscillation movement so that the conductive thin film is deposited on the substrate and the sides of the wire diodes in a conformal and continuous manner.Type: ApplicationFiled: July 27, 2022Publication date: October 3, 2024Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Ludovic DUPRE, Hélène FOURNIER
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Publication number: 20240297204Abstract: A method for producing a native emission matrix including the following steps of: a) providing a base structure including, successively, a substrate, a GaN layer, a doped In(x)GaN layer where x is from 0 to 8%, and an unintentionally doped In(x)GaN epitaxial regrowth layer; b) patterning mesas in the base structure, the mesas comprising a portion of the doped In(x)GaN layer and the unintentionally doped In(x)GaN epitaxial regrowth layer, whereby the mesas are electrically interconnected with one another; c) porosifying electrochemically the doped In(x)GaN layer; and d) carrying out a first LED structure and a second LED structure on the mesas, whereby a first LED having a first emission wavelength, and a second LED having a second emission wavelength, respectively, are obtained, and a native emission matrix is formedType: ApplicationFiled: June 13, 2022Publication date: September 5, 2024Inventors: Amélie DUSSAIGNE, Patrick LE MAITRE, Helge HAAS, Ludovic DUPRE, Carole PERNEL
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Publication number: 20240204130Abstract: A method of manufacturing an electronic device comprising the following successive steps: a) forming a structure comprising a diode stack disposed on a first substrate, and a sacrificial layer of semiconductor material interposed between the first substrate and the diode stack; b) transferring the structure to a second substrate; and c) removing the first substrate by electropolishing the sacrificial layer by applying a bias voltage to the sacrificial layer via the diode stack.Type: ApplicationFiled: December 12, 2023Publication date: June 20, 2024Applicant: Commissariat à I'Énergie Atomique et aux Énergies AlternativesInventors: Ludovic Dupre, Carole Pernel
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Publication number: 20240186444Abstract: A method for manufacturing a growth substrate, including producing mesas based on GaN having various porosification levels, implementing differentiated steps of electrochemical porosification, non-photoassisted and photoassisted, of various portions of the mesas.Type: ApplicationFiled: November 29, 2023Publication date: June 6, 2024Inventors: Ludovic DUPRE, Amélie DUSSAIGNE, Carole PERNEL, Fabian ROL
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Publication number: 20240153986Abstract: A growth substrate adapted for making by epitaxy an array of InGaN based diodes, including mesas M(i), made of GaN based crystalline materials, each including N doped layers, with N?2, separated in pairs by an insulation intermediate layer made of a non-porous material, and each having a free upper face adapted for making a diode of the array by epitaxy; the mesas being configured according to at least three different categories including: a so-called M(N) mesas category where the N doped layers are porous; a so-called M(0) mesas category where none of the doped layers (13, 15) is porous; and a so-called M(n) mesas category where n doped layers are porous, with 1?n<N.Type: ApplicationFiled: October 26, 2023Publication date: May 9, 2024Inventors: Ludovic Dupre, Amélie Dussaigne, Carole Pernel, Fabien Rol
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Publication number: 20240113054Abstract: An electronic chip including a substrate and, on the side of one face of the substrate, a metal pad intended to receive a soldering material, the pad including, in order from said face of the substrate, a first metal layer, an electrically conductive barrier layer, and a second metal layer, wherein an electrically insulating barrier layer is arranged on, and in contact with, the sidewall of the first metal layer over the entire periphery of the metal pad.Type: ApplicationFiled: September 28, 2023Publication date: April 4, 2024Applicant: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Clément Lobre, Eva Serres, Ludovic Dupre
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Patent number: 11581464Abstract: Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.Type: GrantFiled: April 2, 2021Date of Patent: February 14, 2023Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Adrien Gasse, Ludovic Dupre, Marianne Consonni
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Publication number: 20220406968Abstract: A method for manufacturing a native emission matrix, comprising the following steps: a) providing a base structure comprising a substrate, a layer of GaN, a layer of doped In(x)GaN and an epitaxial regrowth layer of nid In(x)GaN, b) structuring first and second mesas in the base structure, the first mesa comprising a part of the layer of GaN, the layer of doped In(x)GaN and the epitaxial regrowth layer of not-intentionally doped In(x)GaN, the second mesa comprising a part of the layer of doped In(x)GaN and the epitaxial regrowth layer of not-intentionally doped In(x)GaN, c) electrochemically porosifying the second mesa, d) producing stacks on the mesas to form LED structures emitting at various wavelengths.Type: ApplicationFiled: June 10, 2022Publication date: December 22, 2022Inventors: Ludovic Dupre, Carole Pernel, Amélie Dussaigne, Patrick Le Maitre
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Publication number: 20210313499Abstract: Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.Type: ApplicationFiled: April 2, 2021Publication date: October 7, 2021Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Adrien GASSE, Ludovic DUPRE, Marianne CONSONNI
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Patent number: 11094742Abstract: A method for producing a photo-emitting and/or photo-receiving device with a metal optical separation grid, comprising at least: producing at least one photo-emitting and/or photo-receiving component, wherein at least one first metal electrode of the photo-emitting and/or photo-receiving component covers side flanks of at least one semiconductor stack of the photo-emitting and/or photo-receiving component and extends to at least one emitting and/or receiving face of the photo-emitting and/or photo-receiving component; treating at least one face of the first metal electrode located at the emitting and/or receiving face, rendering wettable said face of the first metal electrode; producing of the metal optical separation grid on at least one support; fastening of the metal optical separation grid against said face of the first metal electrode by brazing; removing the support.Type: GrantFiled: April 17, 2020Date of Patent: August 17, 2021Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Adrien Gasse, Ludovic Dupre, Marion Volpert
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Publication number: 20210126157Abstract: Method for producing a photoemitting or photoreceiving diode, including: producing, on a first substrate, first and second semiconductor layers with opposite dopings, and a third intrinsic semiconductor layer; etching trenches surrounding remaining portions of the second and third layers and of a first part of the first layer; producing, in the trenches, a dielectric spacer covering side walls of said remaining portions; etching extending the trenches as far as the first substrate; laterally etching a part of the dielectric spacer, exposing contact surfaces of the second part of the first layer; producing, in the trenches, a first electrode in contact with the contact surfaces of the second part of the first layer and with lateral flanks of the second part of the first layer.Type: ApplicationFiled: October 19, 2020Publication date: April 29, 2021Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Ludovic DUPRE, Hélène FOURNIER, Franck HENRY
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Publication number: 20200343296Abstract: A method for producing a photo-emitting and/or photo-receiving device with a metal optical separation grid, comprising at least: producing at least one photo-emitting and/or photo-receiving component, wherein at least one first metal electrode of the photo-emitting and/or photo-receiving component covers side flanks of at least one semiconductor stack of the photo-emitting and/or photo-receiving component and extends to at least one emitting and/or receiving face of the photo-emitting and/or photo-receiving component; treating at least one face of the first metal electrode located at the emitting and/or receiving face, rendering wettable said face of the first metal electrode; producing of the metal optical separation grid on at least one support; fastening of the metal optical separation grid against said face of the first metal electrode by brazing; removing the support.Type: ApplicationFiled: April 17, 2020Publication date: October 29, 2020Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Adrien GASSE, Ludovic DUPRE, Marion VOLPERT
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Patent number: 7669072Abstract: A system comprises a central processing unit and a set of peripheral units accessible by the CPU and being able to be driven by the same clock source. At least one programmable delay line is located in the clock branch of one of the peripheral units and has a delay selection input that is accessible by software running on the system.Type: GrantFiled: January 30, 2007Date of Patent: February 23, 2010Assignee: Atmel CorporationInventors: Alain Vergnes, Ludovic Dupre, David Dumas
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Publication number: 20080183924Abstract: A system comprises a central processing unit and a set of peripheral units accessible by the CPU and being able to be driven by the same clock source. At least one programmable delay line is located in the clock branch of one of the peripheral units and has a delay selection input that is accessible by software running on the system.Type: ApplicationFiled: January 30, 2007Publication date: July 31, 2008Applicant: ATMEL CORPORATIONInventors: Alain Vergnes, Ludovic Dupre, David Dumas