Abstract: The present disclosure relates to a method for manufacturing electronic chips. The method includes forming a plurality of trenches on a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed. The trenches delimit laterally a plurality of chips, and each of the chips includes a single integrated circuit. The method further includes electrically isolating flanks of each of the chips by forming an electrically isolating layer on lateral walls of the trenches.

Abstract: The present disclosure concerns a method of manufacturing an electronic component and the obtained component, comprising a substrate, comprising the successive steps of: depositing a first layer of a first resin activated by abrasion to become electrically conductive, on a first surface of said substrate comprising at least one electric contact and, at least partially, on the lateral flanks of said substrate; partially abrading said first layer on the flanks of said substrate.

Abstract: A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

Abstract: A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

Abstract: A method for manufacturing electronic chips includes forming, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, trenches laterally separating the integrated circuits. At least one metal connection pillar per integrated circuit is deposited on the side of the upper face of the substrate, and a protective resin extends in the trenches and on an upper face of the integrated circuits. The method further includes forming, from an upper face of the protective resin, openings located across from the trenches and extending over a width greater than or equal to that of the trenches, so as to clear a flank of at least one metal pillar of each integrated circuit. The integrated circuits are separated into individual chips by cutting.

Abstract: The disclosure concerns a battery assembly including two batteries having their active layers facing each other and sharing an encapsulation layer.

Abstract: A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

Abstract: A method for manufacturing electronic chips includes forming, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, trenches laterally separating the integrated circuits. At least one metal connection pillar per integrated circuit is deposited on the side of the upper face of the substrate, and a protective resin extends in the trenches and on an upper face of the integrated circuits. The method further includes forming, from an upper face of the protective resin, openings located across from the trenches and extending over a width greater than or equal to that of the trenches, so as to clear a flank of at least one metal pillar of each integrated circuit. The integrated circuits are separated into individual chips by cutting.

Abstract: The present disclosure relates to a method for manufacturing electronic chips. The method includes forming a plurality of trenches on a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed. The trenches delimit laterally a plurality of chips, and each of the chips includes a single integrated circuit. The method further includes electrically isolating flanks of each of the chips by forming an electrically isolating layer on lateral walls of the trenches.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

Abstract: The disclosure concerns a battery assembly including two batteries having their active layers facing each other and sharing an encapsulation layer.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.