Abstract: Methods for copper pillar protection may include forming a metal post over a contact on a semiconductor die, where the metal post comprises a sidewall. A metal cap may be formed on the metal post and may be wider than the width of the metal post. A solder bump may be formed on the metal cap, and a conformal passivation layer may be formed on at least the sidewall of the metal post. The metal cap may be rounded shaped or rectangular shaped in cross-section. The metal post and the metal cap may comprise copper. The metal cap may comprise a copper layer and a nickel layer. The seed metal layer may comprise one or more of titanium, tungsten, and copper. The conformal passivation layer may comprise a nonwettable polymer. Horizontal portions of the conformal passivation layer may be removed utilizing an anisotropic etch such as a plasma etch.

Abstract: Methods for copper pillar protection may include forming a metal post over a contact on a semiconductor die, where the metal post comprises a sidewall. A metal cap may be formed on the metal post and may be wider than the width of the metal post. A solder bump may be formed on the metal cap, and a conformal passivation layer may be formed on at least the sidewall of the metal post. The metal cap may be rounded shaped or rectangular shaped in cross-section. The metal post and the metal cap may comprise copper. The metal cap may comprise a copper layer and a nickel layer. The seed metal layer may comprise one or more of titanium, tungsten, and copper. The conformal passivation layer may comprise a nonwettable polymer. Horizontal portions of the conformal passivation layer may be removed utilizing an anisotropic etch such as a plasma etch.

Abstract: A method of forming a stackable treated via package includes coupling interconnection balls to terminals. The interconnection balls are encapsulated in a package body. Via apertures are formed in the package body to expose the interconnection balls. The interconnection balls are treated to form treated interconnection balls comprising treated surfaces. The treated interconnection balls of the stackable treated via package enhance bonding with interconnection balls of a stacked electronic component package thus maximizing yield.

Abstract: A semiconductor package comprising a leadframe. The leadframe itself comprises an outer frame portion which defines a central opening. Disposed within the central opening is a die pad which defines opposed, generally planar top and bottom die pad surfaces and a peripheral edge. Connected to and extending between the outer frame portion and the peripheral edge of the die pad is at least one tie bar of the leadframe. The leadframe also includes a plurality of leads which are connected to the outer frame portion and extend into the opening at least partially about the die pad in spaced relation to the peripheral edge thereof. Each of the leads includes opposed, generally planar top and bottom lead surfaces, with at least two of the leads comprising corner leads which extend along opposed sides of the tie bar. Each of the corner leads further defines an angularly offset distal portion which extends along and in spaced relation to the tie bar.

Abstract: A semiconductor package comprising a non-conductive film which defines opposed top and bottom film surfaces and includes a plurality of vias disposed therein. Disposed on the top film surface is a plurality of upper leads which circumvent respective ones of the vias. Similarly, disposed on the bottom film surface is a plurality of lower leads which circumvent respective ones of the vias and are electrically connected to respective ones of the upper leads. At least one transmission line element is also disposed on the top film surface and electrically connected to at least one of the upper leads. Attached to the top film surface and electrically connected to at least one of the upper leads and the transmission line element is at least one semiconductor die. A package body at least partially covers the semiconductor die, the upper leads, the transmission line element, and the top film surface.

Abstract: A semiconductor package comprising a leadframe. The leadframe itself comprises an outer frame portion which defines a central opening. Disposed within the central opening is a die pad which defines opposed, generally planar top and bottom die pad surfaces and a peripheral edge. Connected to and extending between the outer frame portion and the peripheral edge of the die pad is at least one tie bar of the leadframe. The leadframe also includes a plurality of leads which are connected to the outer frame portion and extend into the opening at least partially about the die pad in spaced relation to the peripheral edge thereof. Each of the leads includes opposed, generally planar top and bottom lead surfaces, with at least two of the leads comprising corner leads which extend along opposed sides of the tie bar. Each of the corner leads further defines an angularly offset distal portion which extends along and in spaced relation to the tie bar.

Abstract: An integrated circuit chip package comprising a lead frame having an integrated circuit die electrically connected thereto. Partially encapsulating the lead frame and the integrated circuit die is a package body. The package body includes the central portion which is circumvented by a peripheral portion defining opposed top and bottom surfaces. Disposed in at least one of the top and bottom surfaces of the peripheral portion of the package body is a singulation crease. The singulation crease, which is formed in the package body during its molding process, is used to provide a stress concentration line which reduces stress along the edge of the chip package and avoids chipping and cracking problems during the punch singulation process used to complete the manufacture of the same.

Abstract: An integrated circuit chip package comprising a lead frame having an integrated circuit die electrically connected thereto. Partially encapsulating the lead frame and the integrated circuit die is a package body. The package body includes the central portion which is circumvented by a peripheral portion defining opposed top and bottom surfaces. Disposed in at least one of the top and bottom surfaces of the peripheral portion of the package body is a singulation crease. The singulation crease, which is formed in the package body during its molding process, is used to provide a stress concentration line which reduces stress along the edge of the chip package and avoids chipping and cracking problems during the punch singulation process used to complete the manufacture of the same.

Abstract: The present invention includes a package for housing an integrated circuit device. The present invention also includes leadframes and methods for making such packages. In one embodiment, the package includes an integrated circuit device on a metal die pad. A metal ring is between the die pad and leads and surrounds the die pad. The ring is connected to the die pad by a nonconductive adhesive tape. Encapsulant material covers the entire structure, except for portions of the leads. The ring is electrically connected to a lead identified for connection to an external power voltage supply. The ring in turn is electrically connected to a power voltage input pad on the integrated circuit device. The potential of the die pad may float, or the die pad may be electrically connected through a lead to an external ground voltage. The package is made from a leadframe that has a die pad, a metal ring between the die pad and radiating leads, and a nonconductive adhesive tape that connects the ring to the die pad.

Abstract: The present invention includes a package for housing an integrated circuit device. The present invention also includes leadframes and methods for making such packages. The package includes an integrated circuit device on a metal die pad. A metal ring is between the die pad and leads and surrounds the die pad. The ring is connected to the die pad by a nonconductive tape. Encapsulant material covers the entire structure. The ring is connected to a lead identified for connection to an external power voltage supply. The ring in turn is connected to a power voltage input pad on the integrated circuit device. The die pad floats, or is connected to a lead that is connected to an external ground voltage. The package is made from a leadframe that has a die pad, a metal ring between the die pad and radiating leads, and a nonconductive tape that connects the ring to the die pad. In one embodiment, the leadframe and package also include a bypass or decoupling capacitor attached between the die pad and the ring.