Patents by Inventor Ludwig Leipold

Ludwig Leipold has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6774682
    Abstract: A circuit configuration for driving a semiconductor switching element includes an output terminal for the connection of a semiconductor switching element, a capacitive charge storage configuration, which is coupled to the output terminal, a charging and discharging circuit having at least one input for feeding in at least one drive signal and an output connected to the capacitive charge storage configuration, and a discharging circuit with a connecting terminal. The connecting terminal is connected to the capacitive charge storage configuration and provides a discharging current for the charge storage configuration. A charging current or a discharging current for the capacitive charge storage configuration is available at the output depending on the drive signal. A method for driving the semiconductor switching element is also provided.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Thomas Theobald, Ludwig Leipold
  • Patent number: 6734676
    Abstract: A method for generating a control signal after a predeterminable period of time is described. The method includes applying a voltage to an inductor at a beginning of a time measurement; and outputting, via a current threshold value detector, the control signal if a current through the inductor exceeds a predeterminable threshold value. The invention also relates to a timing circuit.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: May 11, 2004
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Leipold, Paul Nance
  • Publication number: 20020093372
    Abstract: A circuit configuration for driving a semiconductor switching element includes an output terminal for the connection of a semiconductor switching element, a capacitive charge storage configuration, which is coupled to the output terminal, a charging and discharging circuit having at least one input for feeding in at least one drive signal and an output connected to the capacitive charge storage configuration, and a discharging circuit with a connecting terminal. The connecting terminal is connected to the capacitive charge storage configuration and provides a discharging current for the charge storage configuration. A charging current or a discharging current for the capacitive charge storage configuration is available at the output depending on the drive signal. A method for driving the semiconductor switching element is also provided.
    Type: Application
    Filed: December 21, 2001
    Publication date: July 18, 2002
    Inventors: Thomas Theobald, Ludwig Leipold, Brigitte Hiebl-Leipold, Stefan-Michael Leipold
  • Publication number: 20020075014
    Abstract: A method for generating a control signal after a predeterminable period of time is described. The method includes applying a voltage to an inductor at a beginning of a time measurement; and outputting, via a current threshold value detector, the control signal if a current through the inductor exceeds a predeterminable threshold value. The invention also relates to a timing circuit.
    Type: Application
    Filed: November 29, 2001
    Publication date: June 20, 2002
    Inventors: Ludwig Leipold, Brigitte Hiebl-Leipold, Stefan-Michael Leipold, Paul Nance
  • Patent number: 6310331
    Abstract: A circuit configuration for driving an ignition coil includes a first semiconductor switch having a load path connected in series with a primary winding of the ignition coil, and having a control electrode, which is driven in accordance with a first drive signal. The circuit configuration further includes a second semiconductor switch having a load path connected in parallel with the primary winding and having a control electrode, which is driven in accordance with a second drive signal.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: October 30, 2001
    Assignee: Infineon Technologies AG
    Inventors: Paul Nance, Peter Sommer, Jenoe Tihanyi, Ludwig Leipold
  • Patent number: 6156621
    Abstract: A method for fabricating direct wafer bond Si/SiO.sub.2 /Si substrates in which trenches are etched into a rear side of a device wafer. Subsequently, the rear side of the device wafer is ground. The device wafer is then placed by its front side onto the carrier wafer and the wafers are cross-linked to each other. The method has the advantage that a trench depth is no longer defined by an inaccurate etching process but rather by a thinning-back process that can be precisely controlled.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: December 5, 2000
    Assignee: Infineon Technologies AG
    Inventors: Paul Nance, Ludwig Leipold, Wolfgang Werner
  • Patent number: 5726478
    Abstract: An integrated power semiconductor component includes a substrate of a first conduction type. At least one first region of a second conduction type is embedded in the substrate and at least one second region of the second conduction type is embedded in the substrate. A substrate contact supplies a supply voltage. Contact-making semiconductor components are embedded in the first region and in the second region. At least a portion of the semiconductor components in the first region control at least a portion of the semiconductor components in the second region. A third region of the second conduction type is disposed between the first region and the second region, and the first region and the third region are at different potentials.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: March 10, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef-Matthias Gantioler, Ludwig Leipold, Rainald Sander, Jens-Peer Stengl, Jenoe Tihanyi
  • Patent number: 5434521
    Abstract: An integrated comparator circuit includes two complementary MOSFETs having main current paths being connected together in a series circuit at a connecting point. An inverter stage has two complementary MOSFETs with gate terminals connected to the connecting point. First, second and third terminals are provided. The first and second terminals are for an operating voltage, and the second and third terminals are for a voltage to be compared. The series circuit is connected between the first and third terminals, and the inverter stage is connected between the first and second terminals. One of the MOSFETs of the series circuit connected to the first terminal and one of the MOSFETs of the inverter stage connected to the first terminal are of the same channel type. The other of the MOSFETs of the series circuit connected to the third terminal and the other of the MOSFETs of the inverter stage connected the second terminal are of the same channel type.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: July 18, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi
  • Patent number: 5371418
    Abstract: Power FETs having a load at the source side require a gate voltage lying above the drain voltage in order to be driven completely conductive. This can occur with a known pump circuit. In the drive circuit disclosed, the diode connected to the gate terminal of the power FET is a depletion FET whose substrate terminal is applied to the oscillating voltage that is required for the operation of the pump circuit. The cut off voltage is thus synchronously set relative to the oscillating voltage such that low losses arise when loading C.sub.GS and an adequately high inhibit voltage can be built up when loading the pump capacitor.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: December 6, 1994
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi
  • Patent number: 5272399
    Abstract: A circuit configuration for limiting current flowing through a power MOSFET includes a voltage divider being connected between drain and source terminals of the power MOSFET and having a node at which a voltage following a drain-to-source voltage of the power MOSFET drops. A control transistor has a load path connected between the gate terminal and the source terminal of the power MOSFET. The control transistor is made conducting as a function of the voltage at the node of the voltage divider if the drain-to-source voltage of the power MOSFET exceeds a predetermined value. A resistor is connected between the gate terminal of the control transistor and the gate terminal of the power MOSFET. A depletion FET has a drain terminal connected to the gate terminal of the control transistor. The source terminal of the depletion FET is connected to the node of the voltage divider. The gate terminal of the depletion FET is connected to the source terminal of the power MOSFET.
    Type: Grant
    Filed: January 15, 1993
    Date of Patent: December 21, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jenoe Tihanyi, Ludwig Leipold, Rainald Sander
  • Patent number: 5266840
    Abstract: A circuit for detecting the non-operating condition of a load which is connected in series with an electronic switch wherein a comparator has a first input which is connected to the junction point between the load and the electronic switch and has a second input which is a reference voltage such that when the load fails the comparator produces an output to indicate such condition and wherein the reference voltage is lower than the normal voltage when the load is operating properly and is higher than when the load is in the inoperative condition.
    Type: Grant
    Filed: December 31, 1992
    Date of Patent: November 30, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber
  • Patent number: 5172290
    Abstract: The gate-source capacitance of a power MOSFET (1) can be protected against positive and negative excess voltages by two integrated Zener diodes (3, 4) the anodes of which are coupled to each other and the cathodes of which are respectively coupled to the gate and source terminals of the power MOSFET. However, when a control voltage is applied, the parasitic bipolar transistor associated with one of the Zener diodes is switched on and prevents the MOSFET from completely switching on. The parasitic bipolar transistor is rendered harmless by the fact that the anode terminal is coupled to a source terminal (S) MOSFET (1) when a gate-source voltage is applied.
    Type: Grant
    Filed: July 20, 1989
    Date of Patent: December 15, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Jenoe Tihanyi, Roland Weber, Rainald Sander
  • Patent number: 5160862
    Abstract: In order to rapidly reduce the magnetic energy of an inductive load (2), the driving voltage must be high. When the load (2) is disconnected via a MOSFET (3), then a premature activation of the MOSFET (3) given reversal of the voltage at the inductive load (2) must be prevented. A series circuit of a Zener diode and of a controllable switch (3) is connected between the gate and the load (2). A current source (depletion MOSFET 5) whose current is lower than the current that would flow upon Zener breakdown is connected between the gate and the source of the power MOSFET (1). The MOSFET (3) becomes conductive upon Zener breakdown and the energy is quickly reduced by a high voltage, essentially by the Zener voltage.
    Type: Grant
    Filed: November 6, 1991
    Date of Patent: November 3, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Hubert Rothleitner, Rainald Sander, Jenoe Tihanyi
  • Patent number: 5086364
    Abstract: The voltage (U.sub.DS) on a power MOSFET (1) is compared with a voltage (U.sub.V) derived from the sum of the voltages of a Zener diode (3) and the threshold voltage (U.sub.T) of a second MOSFET (5) to detect a short circuit in a load (2) in series with the power MOSFET (1). When this total voltage is exceeded, the second MOSFET conducts. Its load current is then evaluated as the short circuit signal.
    Type: Grant
    Filed: February 19, 1991
    Date of Patent: February 4, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber
  • Patent number: 5029322
    Abstract: A power MOSFET composed of a plurality of individual MOSFETs connected in parallel, wherein an additional sensing MOSFET monitors the current in the power MOSFET. The sensing MOSFET has a surface comparatively smaller than the power MOSFET and is connected in parallel with the power MOSFET with a resistor between the source of the power MOSFET and the source of the sensing MOSFET. The sensing MOSFET and resistor are integrated with an integrated circuit provided for the control of the power MOSFET.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: July 2, 1991
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef Einzinger, Ludwig Leipold, Jenoe Tihanyi, Roland Weber
  • Patent number: 4952827
    Abstract: A circuit arrangement for controlling load current of a power MOSFET wherein the load is connected at the source terminal includes a second FET having a defined threshold voltage connected with its drain-source path inserted between the gate and source of the power MOSFET. A third FET connects the gate terminal of the second FET to the drain voltage of the power MOSFET when the power MOSFET is in the conductive condition. When the drain-source voltage of the power MOSFET becomes higher than the threshold voltage of the second FET, the second FET becomes conductive and drives the gate-source voltage of the power MOSFET down.
    Type: Grant
    Filed: November 15, 1989
    Date of Patent: August 28, 1990
    Assignee: Siemens Aktiengellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber, Nance: Paul
  • Patent number: 4947234
    Abstract: A semiconductor component with a power MOSFET and control circuit for controlling the power MOSFET. Both the power MOSFET and the control circuit have separate semiconductor bodies. The semiconductor body of the control circuit is arranged on one of the main surfaces of the semiconductor body of the power MOSFET. The control circuit is electrically insulated from the MOSFET by an insulating layer and mechanically coupled to the MOSFET by means of a bonding layer. The MOSFET is fastened to a cooling body which serves as a heat sink for the semiconductor component. The terminals of the control circuit and the MOSFET are attached to housing connections with leads.
    Type: Grant
    Filed: September 22, 1987
    Date of Patent: August 7, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef Einzinger, Ludwig Leipold, Jeno Tihanyi, Roland Weber
  • Patent number: 4875131
    Abstract: A circuit for monitoring the temperature of a semiconductor structural component. The circuit includes a bipolar transistor (1) in thermal contact with a semiconductor structural element to be monitored, and a MOSFET (11) connected in series with a current source (12). The MOSFET (11) is maintained in a nonconducting state with two Zener diodes (13, 14) if the bipolar transistor (1) is the standard operating temperature of the semiconductor structural element. This circuit provides for a reduced zero current signal. The current flowing through the bipolar transistor (1) increases with temperature and the gate-source voltage of the MOSFET (11) is increases until it switches off. If the current flowing through the MOSFET (11) is greater than the impressed current of the current source (12) the potential across the current source takes a step increase a value near the supply voltage (V.sub.DD). This voltage step can then be detected as an excess-temperature signal.
    Type: Grant
    Filed: April 25, 1989
    Date of Patent: October 17, 1989
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber
  • Patent number: 4730228
    Abstract: The temperature of the power semiconductor component is sensed by a bipolar transistor. The bipolar transistor is in series with a depletion mode MOSFET whose gate and source electrodes are connected together. The drain electrode is also connected to a threshold element. Normally, the FET has low impedance, so that at the input of the threshold element source potential, e.g. ground potential, is present. With current rising as a function of temperature, the current through the FET is limited to a constant, essentially temperature-independent value, and the potential at the input of the threshold element rises steeply. This condition is detected as an overtemperature signal.
    Type: Grant
    Filed: July 16, 1986
    Date of Patent: March 8, 1988
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef Einzinger, Christine Fellinger, Ludwig Leipold, Jenoe Tihanyi, Roland Weber
  • Patent number: 4728826
    Abstract: The voltage peaks occuring upon disconnection of inductive loads are normally attenuated by a by-pass diode connected in parallel with the load. The driving countervoltage is thereby limited to the value of the forward voltage drop of the diode. For a power MOSFET with a source-side inductive load, the driving countervoltage is increased by placing a series connection of an additional MOSFET and a Zener diode between the gate of the power MOSFET and the connection of the load which is remote from the power MOSFET. The driving countervoltage at the source now becomes the Zener voltage plus the occuring gate-source voltage of the power MOSFET.
    Type: Grant
    Filed: July 16, 1986
    Date of Patent: March 1, 1988
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef Einzinger, Christine Fellinger, Ludwig Leipold, Jenoe Tihanyi, Roland Weber