Abstract: A method for defect detection of a chip, an electronic device, and a storage medium. The method includes: obtaining a surface image and a package image of the chip; and inputting the surface image and the package image into a trained target detection network for performing the defect detection, thereby obtaining a surface defect and a package defect of the chip, respectively. The target detection network includes a long-range attention network and a squeeze-and-excitation network configured for determining feature weights of multiple feature channels, and an ACmix module configured for locating and recognizing a small-size target in an image. The method for defect detection of the chip is applied to enable a capability of extracting important features in the chip to be much stronger, enable the attention to the defect in the chip to be much higher, and improve an accuracy of defect detection of the chip.

Abstract: This application is applicable to the field of machine learning technologies and provides a system and a method for target detection. The system includes: a controller and a coprocessor which is in communication connection with the controller. The controller is configured to perform at least some arithmetic operations of a target detection model based on a target image to be detected and/or data sent by the coprocessor. The coprocessor is configured to perform at least some arithmetic operations of the target detection model based on the target image to be detected and/or data sent by the controller. According to the system for target detection, the controller and the coprocessor are utilized to perform some of the arithmetic operations in the target detection model respectively to solve a problem of slow execution speed of target detection task in deployment of the target detection model.

Abstract: A charging terminal includes a connecting base and an inserting part. The charging terminal is arranged inside the charging base. The inserting part includes an insertion hole and a plurality of elastic pieces arranged at intervals in the circumferential direction and enclosed to form the insertion hole. The insertion hole is connected to a pin terminal of a charging gun. The elastic pieces includes a main elastic piece and a transition elastic piece arranged on the end portion of the main elastic piece. The transition elastic piece is connected between the main elastic piece and the connecting base. The outer peripheral surface of the transition elastic piece is a recessed surface. When the pin terminal of the charging gun is inserted into the insertion hole, the transition elastic piece is used for pulling the main elastic piece to move towards a central axis of the insertion hole.

Abstract: A method and a device for a chip layout, computer equipment, and a medium. The method includes steps of: determining external interfaces and internal interfaces of a chip, where the internal interface is a port of a component of the chip; constructing, according to the external interfaces and the internal interfaces, an objective function, where the objective function is applied to describe a wiring length of the chip; determining a target value of the objective function through a preset genetic algorithm, where the target value is applied to determine a first layout diagram of the chip; determining, based on an operation temperature of an internal chip as the component of the chip, a second layout diagram of the chip; performing an image fusion on the first layout diagram and the second layout diagram to obtain a target layout diagram of the chip.