Abstract: A circuit can include a capacitor that has a semiconductor layer, a dielectric layer, and a conductive layer. The circuit can include an insulating layer and a metal or conductive layer. The metal layer can have a first portion that has a first plurality of fingers, and a second portion that has a second plurality of fingers, which can be interdigitated with the first plurality of fingers. The circuit can include one or more first electrical connections that electrically couple the first portion of the metal layer to the semiconductor layer of the capacitor. The circuit can include one or more second electrical connections that electrically couple the second portion of the metal layer to the conductive layer of the capacitor. A capacitance provided by the interdigitated first and second pluralities of fingers can be at least about 3% of a capacitance provided by the capacitor.

Abstract: The invention provides a differential power amplification stage comprising a first amplification unit adapted to amplify a first differential signal and to output an amplified first differential signal, a second amplification unit adapted to amplify a second differential signal having opposite phase to the first differential signal and to output an amplified second differential signal, and a saturation detection unit adapted to detect gain saturation of the first and second amplification unit, to generate a saturation detection signal indicating the gain saturation of first and second amplification unit, and to provide a virtual ground for the first and second differential signals for RF cancellation on the first and second differential signals. The virtual ground principle is also applied to a Doherty power amplifier module which comprises a saturation detection unit for detecting saturation in the carrier amplification stage.

Abstract: A switching circuit comprises a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET, a second series switch coupled to a second output port, and coupling circuitry configured to couple a gate of the fifth FET and a gate of the sixth FET to a first node, a source of the fifth FET and a drain of the sixth FET to a second node, a source of the first FET and a drain of the second FET to a third node, a gate of the first FET and a drain of the fifth FET to a fourth node, a gate of the second FET and a source of the sixth FET to a fifth node, the fourth node and the fifth node to a first gate voltage, and the first node to a second gate voltage that is different than the first gate voltage.

Abstract: In some embodiments, a semiconductor chip can include a substrate, an active wide-bandgap device implemented on the substrate, and a reference wide-bandgap device implemented on the substrate. The reference wide-bandgap device can be configured to provide a response to a condition that also affects the active wide-bandgap device. Such a semiconductor chip can be included in an architecture that allows operation of the active wide-bandgap device based on the response provided by the reference wide-bandgap device.

Abstract: In some embodiments, a radio-frequency system can include a die having a semiconductor substrate and including a radio-frequency circuit and a sensor implemented thereon. The radio-frequency system can further include another die having a semiconductor substrate and including a control circuit for controlling the radio-frequency circuit and a sensor implemented thereon. The control circuit can be configured to receive sensed information from the sensor of the die with the radio-frequency circuit and sensed information from the sensor of the die with the control circuit, and to be capable of adjusting operation of the radio-frequency circuit based on the sensed information from either or both of the sensors. In some embodiments, the radio-frequency system can be implemented as part of a packaged module.

Abstract: Apparatus and methods for power detection with enhanced dynamic range are provided. In certain embodiments, a front end system includes a power amplifier that amplifies a radio frequency (RF) input signal to generate an RF output signal, a directional coupler that generates a sensed RF signal based on sensing the RF output signal from the power amplifier, and a power detector that processes the sensed RF signal to generate a detection signal indicating an output power of the power amplifier. Additionally, the power detector includes two or more detection paths providing different amounts of gain to the sensed RF signal from the directional coupler.

Abstract: A switching circuit comprises a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET, a second series switch coupled to a second output port, and coupling circuitry configured to couple a gate of the fifth FET and a gate of the sixth FET to a first node, a source of the fifth FET and a drain of the sixth FET to a second node, a source of the first FET and a drain of the second FET to a third node, a gate of the first FET and a drain of the fifth FET to a fourth node, a gate of the second FET and a source of the sixth FET to a fifth node, the fourth node and the fifth node to a first gate voltage, and the first node to a second gate voltage that is different than the first gate voltage.

Abstract: Low noise charge pumps are disclosed. In certain embodiments, a charge pump includes a charge pump output terminal configured to provide a charge pump voltage, a switched capacitor, an inverter having an output electrically connected to a first end of the switched capacitor, a pair of charging switches connected between a second end of the switched capacitor and a reference voltage, and a pair of discharging switches connected between the second end of the switched capacitor and the charge pump output terminal. The pair of charging switches is closed during a charging operation and open during a discharging operation, while the pair of discharging switches closed during the discharging operation and open during the charging operation.

Abstract: Embodiments of the invention relate to a circuit assembly for biasing a PIN diode, wherein a DC biasing voltage is obtained by extracting power from a radio-frequency transmission path. The circuit assembly comprises a PIN diode, an input node configured to receive a radio-frequency input voltage, a rectifying circuit configured to receive the radio-frequency input voltage from the input node and generate a rectified voltage, and a smoothing circuit configured to receive the rectified voltage from the rectifying circuit and generate a DC voltage. The output of the smoothing circuit forms the input to the PIN diode to reverse-bias the diode. Related methods, radio-frequency switching circuits and radio-frequency modules are also provided.

Abstract: Low noise charge pumps are disclosed. In certain embodiments, a charge pump includes a charge pump output terminal configured to provide a charge pump voltage, a switched capacitor, an inverter having an output electrically connected to a first end of the switched capacitor, a pair of charging switches connected between a second end of the switched capacitor and a reference voltage, and a pair of discharging switches connected between the second end of the switched capacitor and the charge pump output terminal. The pair of charging switches is closed during a charging operation and open during a discharging operation, while the pair of discharging switches closed during the discharging operation and open during the charging operation.

Abstract: A switching circuit comprises a first transistor, a transformer including a first inductor and a second inductor that is co-centric with the first inductor, a first switch, a second switch, a second transistor, a first output, a second output, and coupling circuitry configured to couple the first inductor to the first transistor, a first end of the second inductor, the first switch, and the first output together at a first node, a second end of the second inductor, the second switch, and the second transistor together at a second node, and the second output to the second transistor.

Abstract: A switching circuit comprises a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET, a second series switch coupled to a second output port, and coupling circuitry configured to couple a gate of the fifth FET and a gate of the sixth FET to a first node, a source of the fifth FET and a drain of the sixth FET to a second node, a source of the first FET and a drain of the second FET to a third node, a gate of the first FET and a drain of the fifth FET to a fourth node, a gate of the second FET and a source of the sixth FET to a fifth node, the fourth node and the fifth node to a first gate voltage, and the first node to a second gate voltage that is different than the first gate voltage.

Abstract: Low noise charge pumps are disclosed. In certain embodiments, a charge pump includes a charge pump output terminal configured to provide a charge pump voltage, a switched capacitor, an inverter having an output electrically connected to a first end of the switched capacitor, a pair of charging switches connected between a second end of the switched capacitor and a reference voltage, and a pair of discharging switches connected between the second end of the switched capacitor and the charge pump output terminal. The pair of charging switches is closed during a charging operation and open during a discharging operation, while the pair of discharging switches closed during the discharging operation and open during the charging operation.

Abstract: A system and method are provided for reducing dynamic EVM of an integrated circuit power amplifier (PA) used for RF communication. In a multistage PA, the largest amplification stage is biased with a high amplitude current pulse upon receipt of a Tx enable, before receipt of the RF signal data burst. The high amplitude current pulse causes a large portion of the total ICQ budget of the multistage PA to pass through the largest amplification stage causing the entire integrated circuit to rapidly approach steady-state operating conditions. A smoothing bias current is applied to the largest amplification stage after the pulse decays to compensate for transient bias current levels while standard bias circuitry is still approaching steady-state temperature.

Abstract: A circuit and method are provided for switching in a semiconductor based high power switch. Complementary p-type based transistors are utilized along insertion loss insensitive paths allowing biasing voltages to alternate between supply and ground, allowing for negative voltage supplies and blocking capacitors to be dispensed with, while improving performance.

Abstract: A system and method are provided for reducing dynamic EVM of an integrated circuit power amplifier (PA) used for RF communication. In a multistage PA, the largest amplification stage is biased with a high amplitude current pulse upon receipt of a Tx enable, before receipt of the RF signal data burst. The high amplitude current pulse causes a large portion of the total ICQ budget of the multistage PA to pass through the largest amplification stage causing the entire integrated circuit to rapidly approach steady-state operating conditions. A smoothing bias current is applied to the largest amplification stage after the pulse decays to compensate for transient bias current levels while standard bias circuitry is still approaching steady-state temperature.

Abstract: A circuit and method are provided for switching in a semiconductor based high power switch. Complementary p-type based transistors are utilized along insertion loss insensitive paths allowing biasing voltages to alternate between supply and ground, allowing for negative voltage supplies and blocking capacitors to be dispensed with, while improving performance.

Abstract: A system and method are provided for reducing dynamic EVM of an integrated circuit power amplifier (PA) used for RF communication. In a multistage PA, the largest amplification stage is biased with a high amplitude current pulse upon receipt of a Tx enable, before receipt of the RF signal data burst. The high amplitude current pulse causes a large portion of the total ICQ budget of the multistage PA to pass through the largest amplification stage causing the entire integrated circuit to rapidly approach steady-state operating conditions. A smoothing bias current is applied to the largest amplification stage after the pulse decays to compensate for transient bias current levels while standard bias circuitry is still approaching steady-state temperature.