Abstract: An automatic redundancy system may exploit an existing microprocessor management system on chip for carrying out autonomously, without communicating with an external testing machine, the operations of: writing data in the memory array according to one or more pre-established test patterns, verifying data successively read from the memory array, and substituting failed elements of the memory array with equivalent redundancy structures. A logic structure may detect and store memory array failures upstream of the output data path. Thereby, data collection relating to failures may be accomplished more quickly and without any interaction with the testing machine apart from communicating the end of the execution of the redundancy process.

Abstract: An automatic redundancy system may exploit an existing microprocessor management system on chip for carrying out autonomously, without communicating with an external testing machine, the operations of: writing data in the memory array according to one or more pre-established test patterns, verifying data successively read from the memory array, and substituting failed elements of the memory array with equivalent redundancy structures. A logic structure may detect and store memory array failures upstream of the output data path. Thereby, data collection relating to failures may be accomplished more quickly and without any interaction with the testing machine apart from communicating the end of the execution of the redundancy process.

Abstract: A charge pump for a nonvolatile memory, having a clock generator circuit supplying an output clock signal; a phase generator circuit receiving the output clock signal, and supplying phase signals; and a voltage booster circuit receiving a supply voltage supplied from outside to the nonvolatile memory and the aforesaid phase signals, and supplying a read voltage higher than the supply voltage. The clock generator circuit includes a comparator receiving the read voltage and a reference voltage, and supplying a selection signal indicating the outcome of the comparison between the read and reference voltages; and a multiplexer receiving a first input clock signal having a pre-set frequency, a second input clock signal having a frequency correlated to the transition frequency of the addresses supplied to the nonvolatile memory, and the selection signal, and supplying the aforesaid output clock signal.

Abstract: A charge pump for a nonvolatile memory, having a clock generator circuit supplying an output clock signal; a phase generator circuit receiving the output clock signal, and supplying phase signals; and a voltage booster circuit receiving a supply voltage supplied from outside to the nonvolatile memory and the aforesaid phase signals, and supplying a read voltage higher than the supply voltage. The clock generator circuit includes a comparator receiving the read voltage and a reference voltage, and supplying a selection signal indicating the outcome of the comparison between the read and reference voltages; and a multiplexer receiving a first input clock signal having a pre-set frequency, a second input clock signal having a frequency correlated to the transition frequency of the addresses supplied to the nonvolatile memory, and the selection signal, and supplying the aforesaid output clock signal.