Abstract: A circuit arrangement comprises a first branch comprising a resistor of variable resistance and a diode-connected bipolar transistor and a second branch comprising a resistor of fixed resistance and another diode-connected bipolar transistor. A control loop reproduces a voltage drop at the resistor of variable resistance to a voltage drop at the resistor of fixed resistance. Output terminals are connected to the bipolar transistors to supply a differential voltage. The circuit arrangement may be used as an analog frontend circuit in a gas sensor or a temperature sensor arrangement.

Abstract: A circuit arrangement comprises a first branch comprising a resistor of variable resistance and a diode-connected bipolar transistor and a second branch comprising a resistor of fixed resistance and another diode-connected bipolar transistor. A control loop reproduces a voltage drop at the resistor of variable resistance to a voltage drop at the resistor of fixed resistance. Output terminals are connected to the bipolar transistors to supply a differential voltage. The circuit arrangement may be used as an analog frontend circuit in a gas sensor or a temperature sensor arrangement.

Abstract: A driver arrangement (10) comprises a digital controller (11) that is configured to receive a digital input signal (SDI) and a driver (12) that comprises a driver input (14) and a driver output (15) and is configured to provide an analog output signal (SANO) at the driver output (15). The driver arrangement (10) comprises a coupling circuit (13) that comprises a digital-to-analog converter (19) and a feedback circuit (24). The digital-to-analog converter (19) comprises a converter input (20) coupled to the digital controller (11) and a converter output (21) coupled to the driver input (14). The feedback circuit (24) is coupled to the driver output (15) and to a feedback input (17) of the digital controller (11).

Abstract: A driver arrangement (10) comprises a digital controller (11) that is configured to receive a digital input signal (SDI) and a driver (12) that comprises a driver input (14) and a driver output (15) and is configured to provide an analog output signal (SANO) at the driver output (15). The driver arrangement (10) comprises a coupling circuit (13) that comprises a digital-to-analog converter (19) and a feedback circuit (24). The digital-to-analog converter (19) comprises a converter input (20) coupled to the digital controller (11) and a converter output (21) coupled to the driver input (14). The feedback circuit (24) is coupled to the driver output (15) and to a feedback input (17) of the digital controller (11).

Abstract: An electronic module (100) has a first and a second circuit (200, 300) with respective first and second output connections (230, 330), respective first and second reference potential connections (220, 320), and respective first and second sensing connections (240, 340), each circuit (200, 300) comprising a respective sensing block (250, 350), which at its input side is connected to the respective sensing connection (240, 340) and to the respective reference potential connection (220, 320). The first sensing connection (240) is either connected to the first output connection (230) or to the second output connection (330). The second sensing connection (340) is connected to the second output connection (330). The sensing blocks (250, 350) are configured to detect a failure of the electronic module (100) with respect to its respective reference potential connection (220, 320) and to indicate a detected failure by providing a failure signal at its respective output connection (230, 330).

Abstract: An electronic module (100) has a first and a second circuit (200, 300) with respective first and second output connections (230, 330), respective first and second reference potential connections (220, 320), and respective first and second sensing connections (240, 340), each circuit (200, 300) comprising a respective sensing block (250, 350), which at its input side is connected to the respective sensing connection (240, 340) and to the respective reference potential connection (220, 320). The first sensing connection (240) is either connected to the first output connection (230) or to the second output connection (330). The second sensing connection (340) is connected to the second output connection (330). The sensing blocks (250, 350) are configured to detect a failure of the electronic module (100) with respect to its respective reference potential connection (220, 320) and to indicate a detected failure by providing a failure signal at its respective output connection (230, 330).

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.