Patents by Inventor Luigi Mariucci

Luigi Mariucci has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8283702
    Abstract: A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: October 9, 2012
    Assignees: STMicroelectronics S.r.l., Consiglio Nazionale delle Ricerche
    Inventors: Dario Salinas, Guglielmo Fortunato, Angelo Magri′, Luigi Mariucci, Massimo Cuscuna, Cateno Marco Camalleri
  • Patent number: 8030192
    Abstract: A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: October 4, 2011
    Assignees: STMicroelectronics S.R.L., Consiglio Nazionale Delle Ricerche
    Inventors: Dario Salinas, Guglielmo Fortunato, Angelo Magri′, Luigi Mariucci, Massimo Cuscuna′, Cateno Marco Camalleri
  • Publication number: 20100237391
    Abstract: A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.
    Type: Application
    Filed: June 4, 2010
    Publication date: September 23, 2010
    Applicants: STMicroelectrics, S.r.I., Consiglio Nazionale Delle Ricerche
    Inventors: Dario SALINAS, Guglielmo Fortunato, Angelo Magri', Luigi Mariucci, Massimo Cuscuna, Cateno Marco Camalleri
  • Patent number: 7674694
    Abstract: A process for realizing TFT devices on a substrate comprises the steps of: forming on the substrate, in cascade, an amorphous silicon layer and a heavily doped amorphous silicon layer, forming a photolithographic mask on the heavily doped amorphous silicon layer provided with an opening, removing the heavily doped amorphous silicon layer through the opening for realizing opposite portions of the heavily doped amorphous silicon layer whose cross dimensions decrease as long as they depart from the amorphous silicon layer, removing the photolithographic mask, carrying out a diffusion and activation step of the dopant contained in the portions of the heavily doped amorphous silicon layer inside the amorphous silicon layer, for realizing source/drain regions of said TFT device.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: March 9, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventors: Salvatore Leonardi, Salvatore Coffa, Claudia Caligiore, Guglielmo Fortunato, Luigi Mariucci, Massimo Cuscuna
  • Publication number: 20080213961
    Abstract: Process for realizing TFT devices on a substrate which comprises the steps of: forming on the substrate, in cascade, an amorphous silicon layer and a heavily doped amorphous silicon layer, forming a photolithographic mask on the heavily doped amorphous silicon layer provided with an opening, removing the heavily doped amorphous silicon layer through the opening for realizing opposite portions of the heavily doped amorphous silicon layer whose cross dimensions decrease as long as they depart from the amorphous silicon layer, removing the photolithographic mask, carrying out a diffusion and activation step of the dopant contained in the portions of the heavily doped amorphous silicon layer inside the amorphous silicon layer, for realizing source/drain regions of said TFT device.
    Type: Application
    Filed: February 14, 2008
    Publication date: September 4, 2008
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Salvatore Leonardi, Salvatore Coffa, Claudia Caligiore, Guglielmo Fortunato, Luigi Mariucci, Massimo Cuscuna
  • Publication number: 20070262297
    Abstract: An organic thin-film transistor device integrated on a substrate and comprising at least an organic active layer and metallic contact regions realized on an insulating layer. Advantageously the organic thin-film transistor device further comprises a thin buffer layer of polymethylmetacrylate or PMMA realized between the metallic contact regions and the organic active layer. A process for manufacturing an organic thin-film transistor device is also described.
    Type: Application
    Filed: May 10, 2006
    Publication date: November 15, 2007
    Inventors: Salvatore Leonardi, Claudia Caligiore, Guglielmo Fortunato, Luigi Mariucci, Stefano Cipolloni, Francesco Angelis
  • Publication number: 20070161217
    Abstract: A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.
    Type: Application
    Filed: November 22, 2006
    Publication date: July 12, 2007
    Inventors: Dario Salinas, Guglielmo Fortunato, Angelo Magri, Luigi Mariucci, Massimo Cuscuna', Cateno Camalleri