Abstract: High voltage testing apparatus producing A.C. test voltages across test probes produces electrical indications truly representative of only resistance in-phase currents flowing through a device being tested even though such device may be capacitive in addition to resistive in nature. Eliminated from such indications are effects otherwise due to quadrature capacitive currents. A transistor is connected between the test probes and is rendered alternatively conductive and nonconductive during succeeding half cycles of the A.C. voltage and such transistor is connected in conjunction with a meter which "samples" the voltage appearing between the test probes only during a first half cycle of the A.C wave during which the positive and negative portions of the quadrature capacitive current average out to a zero flow and thus have no effect on the meter. During the second half cycle of the A.C. wave the meter is effectively short-circuited by the transistor and is thus rendered insensitive.