Patents by Inventor Luis A. Lastras

Luis A. Lastras has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170083507
    Abstract: A method and apparatus are provided for automatically generating and processing first and second concept vector sets extracted, respectively, from a first set of concept sequences and from a second, temporally separated, concept sequences by performing a natural language processing (NLP) analysis of the first concept vector set and second concept vector set to detect changes in the corpus over time by identifying changes for one or more concepts included in the first and/or second set of concept sequences.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 23, 2017
    Inventors: Tin Kam Ho, Luis A. Lastras-Montano, Oded Shmueli
  • Publication number: 20170076206
    Abstract: Mechanisms are provided for performing a cognitive operation. The mechanisms receive an original graph data structure comprising nodes and edges between nodes and activity log information for nodes of the original graph data structure. The mechanisms identify a set of nodes in the original graph data structure having a predetermined pattern of activity in the activity log information, and a set of edges between these nodes. The mechanisms calculate an importance weight for each edge in the set of edges and modify the original graph data structure based on the calculated importance weights for the edges in the set of edges, to thereby generate a modified graph data structure. The mechanisms then perform a cognitive operation based on the modified graph data structure. The set of edges may comprise actual edges between the nodes and/or potential edges between the nodes.
    Type: Application
    Filed: September 16, 2015
    Publication date: March 16, 2017
    Inventors: Luis A. Lastras-Montano, Vinith Misra, Livio B. Soares
  • Publication number: 20170068734
    Abstract: A mechanism is provided for search engine domain transfer. The mechanism receives an input query to search a specialized domain from a user and performs a general-domain search based on the input query to generate a set of general-domain results. The mechanism generates a feature vector based on the general-domain results and generates a score for each document within the specialized domain based on the feature vector. The mechanism generates a ranked result set of documents based on the scores of the documents in the specialized domain and presents the ranked result set to the user.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 9, 2017
    Inventors: Tin K. Ho, Luis A. Lastras-Montano, Vinith Misra
  • Publication number: 20170068737
    Abstract: A mechanism is provided for search engine domain transfer. The mechanism receives an input query to search a specialized domain from a user and performs a general-domain search based on the input query to generate a set of general-domain results. The mechanism generates a feature vector based on the general-domain results and generates a score for each document within the specialized domain based on the feature vector. The mechanism generates a ranked result set of documents based on the scores of the documents in the specialized domain and presents the ranked result set to the user.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 9, 2017
    Inventors: Tin K. Ho, Luis A. Lastras-Montano, Vinith Misra
  • Patent number: 9576023
    Abstract: According to an aspect, summarizing relevance of a document to a conceptual query includes receiving the conceptual query, accessing concepts extracted from the document, and computing a degree to which the conceptual query is related to each of the extracted concepts. The computing is responsive to a metric that measures a relevance between the concepts in the conceptual query and the extracted concepts. An aspect also includes creating a summary by selecting a threshold number of the concepts having a greatest degree of relation to the conceptual query, and outputting the summary including the selected threshold number of concepts.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: February 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Luis A. Lastras-Montano, Livio B. Soares, Mark N. Wegman
  • Publication number: 20170032273
    Abstract: An approach is provided for automatically generating and processing concept vectors by extracting concept sequences from one or more content sources and generating a first concept vector for a first concept by supplying the concept sequences as inputs to a vector learning component, such that the first concept vector comprises information interrelating the first concept to other concepts in the concept sequences which is inferred from the concept sequences.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 2, 2017
    Inventors: Tin Kam Ho, Luis A. Lastras-Montano, Oded Shmueli
  • Patent number: 9542503
    Abstract: Embodiments relate to estimating closeness of topics based on graph analytics. A graph that includes a plurality of nodes and edges is accessed. Each node in the graph represents a topic and each edge represents a known association between two topics. A statistical traversal experiment is performed on the graph. A strength of relations between any two topics represented by nodes in the graph is inferred based on statistics extracted from the statistical traversal experiment.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: January 10, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Livio Soares
  • Patent number: 9513993
    Abstract: Embodiments relate to stale data detection in a marked channel for a scrub. An aspect includes bringing the marked channel online, wherein the computer comprises a plurality of memory channels comprising the marked channel and a remaining plurality of unmarked channels. Another aspect includes performing a scrub read of an address in the plurality of memory channels. Another aspect includes determining whether data returned by the scrub read from the marked channel is valid or stale based on data returned from the unmarked channels by the scrub read. Another aspect includes based on determining that the data returned by the scrub read from the marked channel is valid, not performing a scrub writeback to the marked channel. Another aspect includes based on determining that the data returned by the scrub read from the marked channel is stale, performing a scrub writeback of corrected data to the marked channel.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Luis A. Lastras, Patrick J. Meaney, Eldee Stephens, George C. Wellwood
  • Patent number: 9483580
    Abstract: Embodiments relate to estimating closeness of topics based on graph analytics. A graph that includes a plurality of nodes and edges is accessed. Each node in the graph represents a topic and each edge represents a known association between two topics. A statistical traversal experiment is performed on the graph. A strength of relations between any two topics represented by nodes in the graph is inferred based on statistics extracted from the statistical traversal experiment.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: November 1, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Livio Soares
  • Patent number: 9477550
    Abstract: A memory controller is equipped with multiple error correction circuits for different complexity levels of errors, but requested data is initially sent to a requesting unit (e.g., processor) via a bypass path which provides the lowest memory latency. The requesting unit performs error detection and, if an error is found, sends a retry select signal to the memory controller. The retry select signal provides an indication of which error correction unit should be used to provide complete correction of the error but add the minimum latency necessary. On the retry transmission, the controller uses the particular error correction unit indicated by the retry select signal. The memory controller can also have a persistent error detection circuit which identifies an address as being defective when an error is repeatedly indicated by multiple retry select signals, and the control logic can automatically transmits the requested data using the appropriate error correction unit.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: October 25, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Benjiman L. Goodman, Luis A. Lastras-Montano, Eric E. Retter, Kenneth L. Wright
  • Publication number: 20160299975
    Abstract: Mechanisms, in a system comprising a host system and at least one accelerator device, for performing a concept analysis operation are provided. The host system extracts a set of one or more concepts from an information source and provides the set of one or more concepts to the accelerator device. The host system also provides at least one matrix representation data structure representing a graph of concepts and relationships between concepts in a corpus. The accelerator device executes the concept analysis operation internal to the accelerator device to generate an output vector identifying concepts in the corpus, identified in the at least one matrix representation data structure, related to the set of one or more concepts extracted from the information source. The accelerator device outputs the output vector to the host system which utilizes the output vector to respond to a request submitted to the host system associated with the information source.
    Type: Application
    Filed: April 9, 2015
    Publication date: October 13, 2016
    Inventors: Emrah Acar, Rajesh R. Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian, Livio B. Soares
  • Patent number: 9454422
    Abstract: Error checking and correcting (ECC) may be performed in an on-chip memory where an error is corrected by a controller and not the on-chip memory. The controller may be flagged to show that an error has occurred and where it has occurred in the memory. The controller may access ECC bits associated with the error and may fix incorrect data. The error checking may be done in parallel with read operations of the memory so as to lower latency.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: September 27, 2016
    Assignee: International Business Machines Corporation
    Inventors: Paul W. Coteus, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Luis A. Lastras-Montano, Warren E. Maule, Vipinchandra Patel
  • Publication number: 20160259826
    Abstract: Mechanisms are provided for performing a matrix operation. A processor is configured to perform hybrid compressed representation matrix operations on an input matrix that comprises zero value and non-zero value entries. A first compressed representation data structure corresponding to the input matrix, and a second compressed representation data structure are obtained, each utilizing a different format for representing the non-zero value entries of the input matrix. A matrix operation is iteratively executed on the input matrix using the first compressed representation data structure and the second compressed representation data structure. The first compressed representation data structure is utilized for a first subset of iterations of the matrix operation and the second compressed representation data structure is utilized for a second subset of iterations of the matrix operation different from the first subset of iterations.
    Type: Application
    Filed: March 2, 2015
    Publication date: September 8, 2016
    Inventors: Emrah Acar, Rajesh R. Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Haifeng Qian, Livio B. Soares
  • Patent number: 9436548
    Abstract: A memory controller is equipped with multiple error correction circuits for different complexity levels of errors, but requested data is initially sent to a requesting unit (e.g., processor) via a bypass path which provides the lowest memory latency. The requesting unit performs error detection and, if an error is found, sends a retry select signal to the memory controller. The retry select signal provides an indication of which error correction unit should be used to provide complete correction of the error but add the minimum latency necessary. On the retry transmission, the controller uses the particular error correction unit indicated by the retry select signal. The memory controller can also have a persistent error detection circuit which identifies an address as being defective when an error is repeatedly indicated by multiple retry select signals, and the control logic can automatically transmits the requested data using the appropriate error correction unit.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: September 6, 2016
    Assignee: Globalfoundries Inc.
    Inventors: Benjiman L. Goodman, Luis A. Lastras-Montano, Eric E. Retter, Kenneth L. Wright
  • Publication number: 20160224473
    Abstract: Mechanisms are provided for performing a matrix operation. A processor of a data processing system is configured to perform cluster-based matrix reordering of an input matrix. An input matrix, which comprises nodes associated with elements of the matrix, is received. The nodes are clustered into clusters based on numbers of connections with other nodes within and between the clusters, and the clusters are ordered by minimizing a total length of cross cluster connections between nodes of the clusters, to thereby generate a reordered matrix. A lookup table is generated identifying new locations of nodes of the input matrix, in the reordered matrix. A matrix operation is then performed based on the reordered matrix and the lookup table.
    Type: Application
    Filed: February 2, 2015
    Publication date: August 4, 2016
    Inventors: Emrah Acar, Rajesh R. Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian, Livio B. Soares
  • Publication number: 20160098213
    Abstract: A method includes comparing a number of memory blocks in a first pool of free memory blocks in a memory to a threshold. The memory includes memory blocks that are logically divided into the first pool, a second pool, and a third pool of memory blocks. The first pool of free memory blocks is expanded based on determining that the number of memory blocks in the first pool of free memory blocks is less than the threshold. The expanding includes: selecting a first memory block from the second pool of memory blocks, the first memory block comprising active and non-active content; selecting a second memory block from the third pool of memory blocks; copying the active content of the first memory block to the second memory block; erasing the first memory block; and adding the first memory block to the first pool of free memory blocks.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Michele M. Franceschini, Ken Inoue, Luis A. Lastras-Montano
  • Publication number: 20160071035
    Abstract: A method that comprises receiving a plurality of inputs including data a plurality of multiple business repositories, generating from the plurality of inputs a corpus graph as a statistical relational network, inferring a plurality of new relations between informational elements of the statistical relational network, and generating a plurality of summaries of the plurality of new relations. Further, each summary describes the informational elements of the statistical relational network associated with a corresponding risk-relation.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 10, 2016
    Inventors: Yi-Min Chee, Michele M. Franceshini, Ashish Jagmohan, Elham Khabiri, Luis A. Lastras-Montano, Debdoot Mukherjee, Krishna C. Ratakonda
  • Publication number: 20160012126
    Abstract: According to an aspect, searching, recommending, and exploring documents through conceptual associations includes a method for receiving a plurality of documents and extracting concepts from each of the documents. A degree of relation between each of the documents and concepts in a knowledge base is calculated. The method also includes, in response to receiving a query, determining one or more concepts from the query. For each of the concepts, a list of documents having a highest degree of relation to the concept is retrieved. The method also includes outputting a list that is responsive to the one or more retrieved lists.
    Type: Application
    Filed: March 13, 2015
    Publication date: January 14, 2016
    Inventors: Michele M. Franceschini, Luis A. Lastras-Montano, John T. Richards, Livio B. Soares, Mark N. Wegman
  • Publication number: 20160012044
    Abstract: According to an aspect, searching, recommending, and exploring documents through conceptual associations includes receiving a plurality of documents and extracting concepts from each of the documents. A degree of relation between each of the documents and concepts in a knowledge base is calculated. An aspect also includes, in response to receiving a query, determining one or more concepts from the query. For each of the concepts, a list of documents having a highest degree of relation to the concept is retrieved. An aspect also includes outputting a list that is responsive to the one or more retrieved lists.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 14, 2016
    Inventors: Michele M. Franceschini, Luis A. Lastras-Montano, John T. Richards, Livio B. Soares, Mark N. Wegman
  • Publication number: 20160012119
    Abstract: According to an aspect, automatically adding new concepts to a concept graph includes receiving a string of text, searching a corpus of data to locate additional text related to the string of text, and extracting concepts from the additional text. The extracted concepts include a subset of concepts in the concept graph. The adding new concepts also includes determining whether the string of text should be linked to an existing concept in the concept graph, performing the linking based on determining that the string of text should be linked to the existing concept in the concept graph and, based on determining that the string of text should not be linked to an existing concept in the concept graph, adding a new concept to the concept graph. The new concept is associated with the string of text.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 14, 2016
    Inventors: Michele M. Franceschini, Luis A. Lastras-Montano, Livio B. Soares, Mark N. Wegman