Patents by Inventor Luis Carlos Maria Remis

Luis Carlos Maria Remis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11921473
    Abstract: Apparatus, systems, articles of manufacture, and methods to generate acceptability criteria for autonomous systems plans are disclosed. An example apparatus includes a data compiler to compile data generated by the autonomous system into an autonomous system task dataset, a data encoder to encode the dataset for input into a rule distillation neural network architecture, a model trainer to train the rule distillation neural network architecture, an adaptor to adapt the trained rule distillation neural network architecture to a new input data domain using the autonomous system task dataset, a verifier to generate formally verified acceptability criteria, and an inferer to evaluate a control command, the evaluation resulting in an acceptance or rejection of the command.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 5, 2024
    Assignee: INTEL CORPORATION
    Inventors: Javier Felip Leon, Javier Sebastian Turek, David I. Gonzalez Aguirre, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
  • Patent number: 11727265
    Abstract: Methods, apparatus, systems and articles of manufacture to provide machine programmed creative support to a user are disclosed. An example apparatus include an artificial intelligence architecture to be trained based on previous inputs of the user; a processor to: implement a first machine learning model based on the trained artificial intelligence architecture; and predict a first action based on a current state of a computer program using the first machine learning model; implement a second machine learning model based on the trained artificial intelligence architecture; and predict a second action based on the current state of the computer program using the second machine learning model; and a controller to select a state based on the action that results in a state that is more divergent from the current state of the computer program.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: August 15, 2023
    Assignee: Intel Corporation
    Inventors: Ignacio Javier Alvarez, Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastian Turek, Luis Carlos Maria Remis, Justin Gottschlich
  • Patent number: 11714853
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: August 1, 2023
    Assignee: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Publication number: 20230114468
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Application
    Filed: September 12, 2022
    Publication date: April 13, 2023
    Applicant: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Patent number: 11577388
    Abstract: Apparatus, systems, methods, and articles of manufacture for automatic robot perception programming by imitation learning are disclosed. An example apparatus includes a percept mapper to identify a first percept and a second percept from data gathered from a demonstration of a task and an entropy encoder to calculate a first saliency of the first percept and a second saliency of the second percept. The example apparatus also includes a trajectory mapper to map a trajectory based on the first percept and the second percept, the first percept skewed based on the first saliency, the second percept skewed based on the second saliency. In addition, the example apparatus includes a probabilistic encoder to determine a plurality of variations of the trajectory and create a collection of trajectories including the trajectory and the variations of the trajectory.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: February 14, 2023
    Assignee: Intel Corporation
    Inventors: David I. Gonzalez Aguirre, Javier Felip Leon, Javier Sebastián Turek, Luis Carlos Maria Remis, Ignacio Javier Alvarez, Justin Gottschlich
  • Publication number: 20230031591
    Abstract: Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.
    Type: Application
    Filed: June 29, 2022
    Publication date: February 2, 2023
    Inventors: Luis Carlos Maria Remis, Ignacio Javier Alvarez, Li Chen, Javier Felip Leon, David Israel Gonzalez Aguirre, Justin Gottschlich, Javier Sebastian Turek
  • Patent number: 11450123
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Patent number: 11386256
    Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Javier Sebastián Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich
  • Patent number: 11386157
    Abstract: Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Ignacio Javier Alvarez, Li Chen, Javier Felip Leon, David Israel Gonzalez Aguirre, Justin Gottschlich, Javier Sebastian Turek
  • Publication number: 20220193895
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for object manipulation via action sequence optimization. An example method disclosed herein includes determining an initial state of a scene, generating a first action phase sequence to transform the initial state of the scene to a solution state of the scene by selecting a plurality of action phases based on action phase probabilities, determining whether a first simulated outcome of executing the first action phase sequence satisfies an acceptability criterion and, when the first simulated outcome does not satisfy the acceptability criterion, calculating a first cost function output based on a difference between the first simulated outcome and the solution state of the scene, the first cost function output utilized to generate updated action phase probabilities.
    Type: Application
    Filed: December 31, 2021
    Publication date: June 23, 2022
    Inventors: Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastián Turek, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
  • Publication number: 20220188028
    Abstract: In one embodiment, a system comprises a host processor and a storage system. The storage system comprises one or more storage devices, and each storage device comprises a non-volatile memory and a compute offload controller. The non-volatile memory stores data, and the compute offload controller performs compute tasks on the data based on compute offload commands from the host processor.
    Type: Application
    Filed: March 12, 2020
    Publication date: June 16, 2022
    Applicant: Intel Corporation
    Inventors: Michael P. Mesnier, John S. Keys, Ian F. Adams, Yi Zou, Luis Carlos Maria Remis, Daniel Robert McLeran, Mariusz Barczak, Arun Raghunath, Lay Wai Kong
  • Publication number: 20220180651
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Application
    Filed: July 13, 2021
    Publication date: June 9, 2022
    Applicant: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Publication number: 20220164384
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Application
    Filed: June 29, 2021
    Publication date: May 26, 2022
    Applicant: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Patent number: 11213947
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for object manipulation via action sequence optimization. An example method disclosed herein includes determining an initial state of a scene, generating a first action phase sequence to transform the initial state of the scene to a solution state of the scene by selecting a plurality of action phases based on action phase probabilities, determining whether a first simulated outcome of executing the first action phase sequence satisfies an acceptability criterion and, when the first simulated outcome does not satisfy the acceptability criterion, calculating a first cost function output based on a difference between the first simulated outcome and the solution state of the scene, the first cost function output utilized to generate updated action phase probabilities.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: January 4, 2022
    Assignee: INTEL CORPORATION
    Inventors: Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastián Turek, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
  • Patent number: 11093530
    Abstract: Technologies for management of data layers in a heterogeneous geographic information system (GIS) map are disclosed. A compute device may maintain a GIS database that includes geo-quads that represent physical locations of various scales. Data layers and layer tracks may be dynamically added to the GIS database at different scales, allowing for an extensible framework that enables a mechanism for integrating additional functionality. In the illustrative embodiment, a graph database is used to store the GIS database, allowing for a flexible structure. In some embodiments, entries in layer tracks may include binary large objects that may have properties and associated methods, allowing for application-specific functionality.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: August 17, 2021
    Assignee: Intel Corporation
    Inventors: David Israel Gonzalez Aguirre, Javier Felip Leon, Maria Soledad Elli, Luis Carlos Maria Remis, Javier Sebastian Turek
  • Patent number: 11068757
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: July 20, 2021
    Assignee: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Patent number: 11061650
    Abstract: Methods and apparatus to automatically generate code for graphical user interfaces are disclosed. An example apparatus includes a textual description analyzer to encode a user-provided textual description of a GUI design using a first neural network. The example apparatus further includes a DSL statement generator to generate a DSL statement with a second neural network. The DSL statement is to define a visual element of the GUI design. The DSL statement is generated based on at least one of the encoded textual description or a user-provided image representative of the GUI design. The example apparatus further includes a rendering tool to render a mockup of the GUI design based on the DSL statement.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 13, 2021
    Assignee: Intel Corporation
    Inventors: Javier Sebastian Turek, Javier Felip Leon, Luis Carlos Maria Remis, David Israel Gonzalez Aguirre, Ignacio Javier Alvarez, Justin Gottschlich
  • Patent number: 11055349
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Publication number: 20210157968
    Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.
    Type: Application
    Filed: November 30, 2020
    Publication date: May 27, 2021
    Inventors: Javier Sebastián Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich
  • Patent number: 10853554
    Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: December 1, 2020
    Assignee: Intel Corporation
    Inventors: Javier Sebastian Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich