Abstract: An integrated circuit includes a digital logic circuit, a multiplexer (MUX) having a first and a second data input, a control input, and an output coupled to an input of the digital logic circuit. The second data input is coupled to receive a high frequency clock signal. The integrated circuit includes a very low frequency (VLF) clock is configured to provide a VLF clock signal when enabled, and a counter coupled to receive the VLF clock signal and configured to toggle an output of the counter upon counting a predetermined number of cycles of the VLF clock signal. The output of the counter is coupled to the first data input of the MUX. The MUX is configured to provide the first data input as the output of the MUX during a low power mode, and otherwise to provide the second data input as the output of the MUX.

Abstract: A method and system for decoding a received data stream are disclosed. The appropriate time interval to decode the received data stream is derived from the data stream itself. A header of the data stream is analyzed to determine two sets of time ranges, each set of time ranges corresponding to a set of possible data transmission intervals. A preamble of the header contains timing information for development of a first set of time ranges to decode a synchronization word of the header. The synchronization word contains both data information and timing information to develop the second set of time ranges. The data information included in the header is used validate the data stream for the receiving device. The second set of time ranges is used to decode a data payload portion of the data stream.

Abstract: A system and method for decoding a received data stream is disclosed. The method includes detecting first and second data transitions of a received data stream. Each of the data transitions is of a first transition type (e.g. rising or falling transition). The time interval between the data transitions is measured, and a logic value of a data bit encoded in the data stream is decoded based on the measured time interval. By decoding the data stream based on the time intervals between data transitions, the number of decoding errors due to timing changes in the data stream (such as changes due to drift or jitter in the data stream) is reduced.

Abstract: A method and system for decoding a received data stream are disclosed. The appropriate time interval to decode the received data stream is derived from the data stream itself. A header of the data stream is analyzed to determine two sets of time ranges, each set of time ranges corresponding to a set of possible data transmission intervals. A preamble of the header contains timing information for development of a first set of time ranges to decode a synchronization word of the header. The synchronization word contains both data information and timing information to develop the second set of time ranges. The data information included in the header is used validate the data stream for the receiving device. The second set of time ranges is used to decode a data payload portion of the data stream.

Abstract: A system and method for decoding a received data stream is disclosed. The method includes detecting first and second data transitions of a received data stream. Each of the data transitions is of a first transition type (e.g. rising or falling transition). The time interval between the data transitions is measured, and a logic value of a data bit encoded in the data stream is decoded based on the measured time interval. By decoding the data stream based on the time intervals between data transitions, the number of decoding errors due to timing changes in the data stream (such as changes due to drift or jitter in the data stream) is reduced.