Patents by Inventor Luis J. Matienzo
Luis J. Matienzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6693031Abstract: An electronic structure including a metallic interlocking structure for bonding a conductive plated layer to metal surface, and a method of forming the electronic structure. The method provides a substrate having a metallic sheet within a dielectric layer. The metallic sheet includes a metal such as copper. An opening in the substrate, such as a blind via, is formed by laser drilling through the dielectric layer and partially through the metallic sheet. If the opening is a blind via, then the laser drilling is within an outer ring of the blind via cross section using a laser beam having a target diameter between about 20% and about 150% of a radius of the blind via cross section. A surface at the bottom of the opening, called a “blind surface,” includes a metallic protrusion formed by the laser drilling, such that the metallic protrusion is integral with a portion of the blind surface.Type: GrantFiled: January 4, 2002Date of Patent: February 17, 2004Assignee: International Business Machines CorporationInventors: Gerald G. Advocate, Jr., Francis J. Downes, Jr., Luis J. Matienzo, Ronald A. Kaschak, John S. Kresge, Daniel C. Van Hart
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Patent number: 6656313Abstract: A method for improving the adhesion between polyimide layers and the structure formed by the method. A silicon oxide-containing layer is formed on the surface of a polyimide layer and a second layer of polyimide is formed on the silicon oxide-containing layer.Type: GrantFiled: June 11, 2001Date of Patent: December 2, 2003Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Luis J. Matienzo
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Publication number: 20030203535Abstract: An electronic module having enhanced adhesion at the chip passivation and underfill interface is disclosed. The surface of the chip passivation is chemically modified to a sufficient depth such that the cured passivation is more reactive. The modified surface is treated with a polyamine preferably having a cyclic amine group extending from a preferably aliphatic backbone. During reflow of the solder joints of the electronic module by heating, the modified passivation reacts with the polyamine at the amine functionality. Following underfill of the electronic module with a polymeric material, preferably an epoxy resin, the polyamine on the surface of the passivation reacts with the underfill material during curing of the underfill material. The resulting electronic module is more robust since the amine acts as a chemical anchoring site for both the modified passivation and the underfill material.Type: ApplicationFiled: March 31, 2003Publication date: October 30, 2003Applicant: International Business Machines CorporationInventors: Ramesh R. Kodnani, Luis J. Matienzo, Son K. Tran
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Patent number: 6607613Abstract: A metal alloy solder ball comprising a first metal and a second metal, the first metal having a sputtering yield greater than the second metal. The solder ball comprises a bulk portion having a bulk ratio of the first metal to the second metal, an outer surface, and a surface gradient having a depth and a gradient ratio of the first metal to the second metal that is less than the bulk ratio. The gradient ratio increases along the surface gradient depth from a minimum at the outer surface. The solder ball may be formed by the process of exposing the ball to energized ions of a sputtering gas for an effective amount of time to form the surface gradient.Type: GrantFiled: February 1, 2001Date of Patent: August 19, 2003Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart
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Patent number: 6596559Abstract: An electronic module having enhanced adhesion at the chip passivation and underfill interface is disclosed. The surface of the chip passivation is chemically modified to a sufficient depth such that the cured passivation is more reactive. The modified surface is treated with a polyamine preferably having a cyclic amine group extending from a preferably aliphatic backbone. During reflow of the solder joints of the electronic module by heating, the modified passivation reacts with the polyamine at the amine functionality. Following underfill of the electronic module with a polymeric material, preferably an epoxy resin, the polyamine on the surface of the passivation reacts with the underfill material during curing of the underfill material. The resulting electronic module is more robust since the amine acts as a chemical anchoring site for both the modified passivation and the underfill material.Type: GrantFiled: March 30, 2001Date of Patent: July 22, 2003Assignee: International Business Machines CorporationInventors: Ramesh R. Kodnani, Luis J. Matienzo, Son K. Tran
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Publication number: 20030123229Abstract: A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive.Type: ApplicationFiled: February 19, 2003Publication date: July 3, 2003Inventors: Frank D. Egitto, Michael A. Gaynes, Ramesh R. Kodnani, Luis J. Matienzo, Mark V. Pierson
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Patent number: 6576549Abstract: A method and structure for forming a metalized blind via. A dielectric layer is formed on a metallic layer, followed by laser drilling a depression in the dielectric layer such that a carbon film that includes the carbon is formed on a sidewall of the depression. If the laser drilling does not expose the metallic layer, then an anisotropic plasma etching, such as a reactive ion etching (RIE), may be used to clean and expose a surface of the metallic layer. The dielectric layer includes a dielectric material having a carbon based polymeric material, such as a permanent photoresist, a polyimide, and advanced solder mask (ASM). The metallic layer includes a metallic material, such as copper, aluminum, and gold. The carbon film is in conductive contact with the metallic layer, and the carbon film is sufficiently conductive to permit electroplating a continuous layer of metal (e.g., copper) directly on the carbon film without need of an electrolessly plated layer underneath the electroplated layer.Type: GrantFiled: October 28, 2002Date of Patent: June 10, 2003Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Elizabeth Foster, Raymond T. Galasco, David E. Houser, Mark L. Janecek, Thomas E. Kindl, Jeffrey A. Knight, Stephen W. MacQuarrie, Voya R. Markovich, Luis J. Matienzo, Amarjit S. Rai, David J. Russell, William T. Wike
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Patent number: 6576996Abstract: A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive.Type: GrantFiled: January 9, 2001Date of Patent: June 10, 2003Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Michael A. Gaynes, Ramesh R. Kodnani, Luis J. Matienzo, Mark V. Pierson
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Publication number: 20030054635Abstract: A method and structure for forming a metalized blind via. A dielectric layer is formed on a metallic layer, followed by laser drilling a depression in the dielectric layer such that a carbon film that includes the carbon is formed on a sidewall of the depression. If the laser drilling does not expose the metallic layer, then an anisotropic plasma etching, such as a reactive ion etching (RIE), may be used to clean and expose a surface of the metallic layer. The dielectric layer comprises a dielectric material having a carbon based polymeric material, such as a permanent photoresist, a polyimide, and advanced solder mask (ASM). The metallic layer includes a metallic material, such as copper, aluminum, and gold. The carbon film is in conductive contact with the metallic layer, and the carbon film is sufficiently conductive to permit electroplating a continuous layer of metal (e.g., copper) directly on the carbon film without need of an electrolessly plated layer underneath the electroplated layer.Type: ApplicationFiled: October 28, 2002Publication date: March 20, 2003Inventors: Frank D. Egitto, Elizabeth Foster, Raymond T. Galasco, David E. Houser, Mark L. Janecek, Thomas E. Kindl, Jeffrey A. Knight, Stephen W. MacQuarrie, Voya R. Markovich, Luis J. Matienzo, Amarjit S. Rai, David J. Russell, William T. Wike
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Patent number: 6522014Abstract: A method and structure for forming a metalized blind via. A dielectric layer is formed on a metallic layer, followed by laser drilling a depression in the dielectric layer such that a carbon film that includes the carbon is formed on a sidewall of the depression. If the laser drilling does not expose the metallic layer, then an anisotropic plasma etching, such as a reactive ion etching (RIE), may be used to clean and expose a surface of the metallic layer. The dielectric layer comprises a dielectric material having a carbon based polymeric material, such as a permanent photoresist, a polyimide, and advanced solder mask (ASM). The metallic layer includes a metallic material, such as copper, aluminum, and gold. The carbon film is in conductive contact with the metallic layer, and the carbon film is sufficiently conductive to permit electroplating a continuous layer of metal (e.g., copper) directly on the carbon film without need of an electrolessly plated layer underneath the electroplated layer.Type: GrantFiled: September 27, 2000Date of Patent: February 18, 2003Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Elizabeth Foster, Raymond T. Galasco, David E. Houser, Mark L. Janecek, Thomas E. Kindl, Jeffrey A. Knight, Stephen W. MacQuarrie, Voya R. Markovich, Luis J. Matienzo, Amarjit S. Rai, David J. Russell, William T. Wike
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Publication number: 20020195197Abstract: A method for improving the adhesion between polyimide layers and the structure formed by the method. A silicon oxide-containing layer is formed on the surface of a polyimide layer and a second layer of polyimide is formed on the silicon oxide-containing layer.Type: ApplicationFiled: June 11, 2001Publication date: December 26, 2002Applicant: International Business Machines CorporationInventors: Frank D. Egitto, Luis J. Matienzo
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Patent number: 6447914Abstract: The present invention comprises a method of making a circuitized structure. The method comprises the steps of providing a substrate coated with a polymeric dielectric layer, treating the substrate with alkali, baking the substrate to modify the surface of the polymeric dielectric layer, applying a seed layer to the polymeric dielectric layer and applying conductive layer to the seed layer. The invention also comprises a printed circuit structure produced by the method of the present invention.Type: GrantFiled: July 3, 2000Date of Patent: September 10, 2002Assignee: International Business Machines CorporationInventors: Anastasios P. Angelopoulos, Gerald W. Jones, Luis J. Matienzo, Thomas R. Miller, William D. Taylor
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Patent number: 6420253Abstract: A method and structure is provided for preventing wetting or bleed of an adhesive, such as an epoxy, onto noble metal wire bond pads on the surface of a dielectric substrate when attaching an I/C chip to the substrate. The method includes treating the wire bond pads with a chemical composition which prevents bleeding onto the surfaces of the wire bond pads by a component of the epoxy. The chemical composition is a chemical which will provide “Self-Assembled Monolayers” (SAMs) on the surface of the gold. These compositions are characterized by a molecule having at least one group, such as a mercaptan or disulfide, connected to a hydrocarbon moiety, such as a (CH2)x chain. The affinity of the thiol or sulfur-containing portion of the molecule chemically bonding with the noble metal provides a relatively strong attachment of the molecule to the metal surface.Type: GrantFiled: June 14, 2001Date of Patent: July 16, 2002Assignee: International Business Machines CorporationInventors: Bernd K. Appelt, Gary A. Johansson, Gerald W. Jones, Luis J. Matienzo, Yenloan H. Nguyen, Konstantinos I. Papathomas
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Patent number: 6410988Abstract: A method of making a flip chip package that maintains flatness over a wide temperature range and provides good heat dissipation is described. A laminate substrate is electrically connected to electrical contacts disposed on a chip and underfill material is applied between the soldered connections. A body, for example an uncured dielectric material, is applied to the chip, the laminate substrate, a thermally conductive member or combinations thereof, and thermally conductive member is disposed adjacent to the surface of the chip that is opposite the surface connected to the laminate substrate. The body is extruded between the chip and the thermally conductive member. The thickness of the thermally conductive member is determined by balancing the stiffness and the CTE of both the thermally conductive member and the laminate substrate, and the length and width of the thermally conductive member may vary but are at least the size of the corresponding length and width of the chip.Type: GrantFiled: May 15, 2000Date of Patent: June 25, 2002Assignee: International Business Machines CorporationInventors: David V. Caletka, Jean Dery, Eric Duchesne, Michael A. Gaynes, Eric A. Johnson, Luis J. Matienzo, James R. Wilcox
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Publication number: 20020056890Abstract: An electronic structure including a metallic interlocking structure for bonding a conductive plated layer to metal surface, and a method of forming the electronic structure. The method provides a substrate having a metallic sheet within a dielectric layer. The metallic sheet includes a metal such as copper. An opening in the substrate, such as a blind via, is formed by laser drilling through the dielectric layer and partially through the metallic sheet. If the opening is a blind via, then the laser drilling is within an outer ring of the blind via cross section using a laser beam having a target diameter between about 20% and about 150% of a radius of the blind via cross section. A surface at the bottom of the opening, called a “blind surface,” includes a metallic protrusion formed by the laser drilling, such that the metallic protrusion is integral with a portion of the blind surface.Type: ApplicationFiled: January 4, 2002Publication date: May 16, 2002Applicant: International Business Machines CorporationInventors: Gerald G. Advocate, Francis J. Downes, Luis J. Matienzo, Ronald A. Kaschak, John S. Kresge, Daniel C. Van Hart
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Patent number: 6348738Abstract: A method for forming a flip-chip-on-board assembly. An integrated circuit (IC) chip having a polyimide passivation layer is joined to a chip carrier via a plurality of solder bumps which electrically connect a plurality of contact pads on the IC chip to corresponding contacts on the chip carrier. A space is formed between a surface of the passivation layer and a surface of the chip carrier. A plasma is applied, to chemically modify the surface of the chip carrier and the passivation layer of the IC chip substantially without roughening the surface of the passivation layer. The plasma is either an O2 plasma or a microwave-generated Ar and N2O plasma. An underfill encapsulant material is applied to fill the space. The plasma treatment may be performed after the step of joining. Then, the chip and chip carrier are treated with the plasma simultaneously. Alternatively, the IC chip and chip carrier may be treated with the plasma before they are joined to one another.Type: GrantFiled: August 11, 1999Date of Patent: February 19, 2002Assignee: International Business Machines CorporationInventors: Jean Dery, Frank D. Egitto, Luis J. Matienzo, Charles Ouellet, Luc Ouellet, David L. Questad, William J. Rudik, Son K. Tran
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Patent number: 6348737Abstract: An electronic structure including a metallic interlocking structure for bonding a conductive plated layer to metal surface, and a method of forming the electronic structure. The method provides a substrate having a metallic sheet within a dielectric layer. The metallic sheet includes a metal such as copper. An opening in the substrate, such as a blind via, is formed by laser drilling through the dielectric layer and partially through the metallic sheet. If the opening is a blind via, then the laser drilling is within an outer ring of the blind via cross section using a laser beam having a target diameter between about 20% and about 150% of a radius of the blind via cross section. A surface at the bottom of the opening, called a “blind surface,” includes a metallic protrusion formed by the laser drilling, such that the metallic protrusion is integral with a portion of the blind surface.Type: GrantFiled: March 2, 2000Date of Patent: February 19, 2002Assignee: International Business Machines CorporationInventors: Gerald G. Advocate, Jr., Francis J. Downes, Jr., Luis J. Matienzo, Ronald A. Kaschak, John S. Kresge, Daniel C. Van Hart
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Publication number: 20020005245Abstract: A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive.Type: ApplicationFiled: January 9, 2001Publication date: January 17, 2002Inventors: Frank D. Egitto, Michael A. Gaynes, Ramesh R. Kodnani, Luis J. Matienzo, Mark V. Pierson
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Patent number: 6306683Abstract: A method for forming a flip-chip-on-board assembly. An integrated circuit (IC) chip having a polyimide passivation layer is joined to a chip carrier via a plurality of solder bumps which electrically connect a plurality of contact pads on the IC chip to corresponding contacts on the chip carrier. A space is formed between a surface of the passivation layer and a surface of the chip carrier. A plasma is applied, to chemically modify the surface of the chip carrier and the passivation layer of the IC chip substantially without roughening the surface of the passivation layer. The plasma is either an O2 plasma or a microwave-generated Ar and N2O plasma. An underfill encapsulant material is applied to fill the space. The plasma treatment may be performed after the step of joining. Then, the chip and chip carrier are treated with the plasma simultaneously. Alternatively, the IC chip and chip carrier may be treat with the plasma before they are joined to one another.Type: GrantFiled: March 16, 2000Date of Patent: October 23, 2001Assignee: International Business Machines CorporationInventors: Jean Dery, Frank D. Egitto, Luis J. Matienzo, Charles Ouellet, Luc Ouellet, David L. Questad, William J. Rudik, Son K. Tran
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Publication number: 20010028117Abstract: A method and structure is provided for preventing wetting or bleed of an adhesive, such as an epoxy, onto noble metal wire bond pads on the surface of a dielectric substrate when attaching an I/C chip to the substrate. The method includes treating the wire bond pads with a chemical composition which prevents bleeding onto the surfaces of the wire bond pads by a component of the epoxy. The chemical composition is a chemical which will provide “Self-Assembled Monolayers” (SAMs) on the surface of the gold. These compositions are characterized by a molecule having at least one group, such as a mercaptan or disulfide, connected to a hydrocarbon moiety, such as a (CH2)x chain. The affinity of the thiol or sulfur-containing portion of the molecule chemically bonding with the noble metal provides a relatively strong attachment of the molecule to the metal surface.Type: ApplicationFiled: June 14, 2001Publication date: October 11, 2001Applicant: International Business Machines CorporationInventors: Bernd K. Appelt, Gary A. Johansson, Gerald W. Jones, Luis J. Matienzo, Yenloan H. Nguyen, Konstantinos I. Papathomas