Patents by Inventor Luis Vila

Luis Vila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12356333
    Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: July 8, 2025
    Assignee: Apple Inc.
    Inventors: Chia Yiaw Chong, Pablo Luis Vila Rodriguez, Sajeev Alakkatt Paleri, Qiong Wu, Kai Bai, Hsin-Yuo Liu, Peter M. Agboh, Derek Keith Shaeffer, Daya Krishna
  • Publication number: 20250030999
    Abstract: The invention relates to an editor and player in eight real dimensions, characterised by a software and hardware suite that allows music to be recorded and mixed in eight different channels to create the sensation of immersive sound, so that the music feels as real for the listener as if it were being performed live around them. The suite consists of a sound manipulation software program and a distribution device capable of recording, editing and mixing multi-channel music pieces combined with reverberation effects and directivity and directionality patterns.
    Type: Application
    Filed: January 16, 2023
    Publication date: January 23, 2025
    Inventor: Luis VILA VILA
  • Publication number: 20240300041
    Abstract: A ribbon saw with a double security system is provided that includes a cutting ribbon (3), vertically installed between an upper part (1a) and a lower part (1b) with driving mechanism and control electronics. The control electronics include a first artificial vision security system, with a camera (5) and a second magnetic artificial vision security system, with an inductive sensor or metal detector (6) installed on the table (4), in front of the cutting ribbon (3). The security system is connected to one or two braking systems (14,15) based on a disc (14) and a pneumatic clamp (15) that stops the mechanism of pulleys (12a, 12b) of the ribbon (3), when it detects the color and the metallic or ferrous material of the gloves that the operator wears.
    Type: Application
    Filed: February 23, 2024
    Publication date: September 12, 2024
    Applicant: EQUIPAMIENTOS CARNICOS, S.L.
    Inventors: Luis Vila Gonzalez, Jordi Vila Gonzalez
  • Patent number: 11979151
    Abstract: An integrated circuit includes a plurality of analog inputs, and an analog multiplexer (MUX). The MUX includes a common output node configured to provide a MUX output, a plurality of analog switches, and a shared buffer. Each switch includes a corresponding bootstrap circuit coupled to a control electrode of a corresponding pass transistor in which the corresponding bootstrap circuit includes a corresponding boosting capacitor. Each analog switch of the plurality of analog switches has a first input coupled to a corresponding analog input of the plurality of analog inputs, a second input, and an output coupled to the common output node. The shared buffer has an input coupled to the common output node and coupled to provide a common buffered MUX output to the second input of each of the plurality of analog switches.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 7, 2024
    Assignee: NXP USA, Inc.
    Inventors: Khoi Mai, Michael Todd Berens, Andre Luis Vilas Boas, Felipe Ricardo Clayton
  • Publication number: 20240097686
    Abstract: An integrated circuit includes a plurality of analog inputs, and an analog multiplexer (MUX). The MUX includes a common output node configured to provide a MUX output, a plurality of analog switches, and a shared buffer. Each switch includes a corresponding bootstrap circuit coupled to a control electrode of a corresponding pass transistor in which the corresponding bootstrap circuit includes a corresponding boosting capacitor. Each analog switch of the plurality of analog switches has a first input coupled to a corresponding analog input of the plurality of analog inputs, a second input, and an output coupled to the common output node. The shared buffer has an input coupled to the common output node and coupled to provide a common buffered MUX output to the second input of each of the plurality of analog switches.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: Khoi Mai, Michael Todd Berens, Andre Luis Vilas Boas, Felipe Ricardo Clayton
  • Publication number: 20230354201
    Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.
    Type: Application
    Filed: July 11, 2023
    Publication date: November 2, 2023
    Inventors: Chia Yiaw Chong, Pablo Luis Vila Rodriguez, Sajeev Alakkatt Paleri, Qiong Wu, Kai Bai, Hsin-Yuo Liu, Peter M. Agboh, Derek Keith Shaeffer, Daya Krishna
  • Patent number: 11722964
    Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: August 8, 2023
    Assignee: Apple Inc.
    Inventors: Chia Yiaw Chong, Pablo Luis Vila Rodriguez, Sajeev Alakkatt Paleri, Qiong Wu, Kai Bai, Hsin-Yuo Liu, Peter M. Agboh, Derek Keith Shaeffer, Daya Krishna
  • Patent number: 11644487
    Abstract: An integrated circuit including a comparator having a first input to receive a reference voltage, a second input, and an output to provide an under-voltage indicator. Sense points are configured to provide a plurality of sense point voltages, each sense point providing a corresponding sense point voltage of the plurality of sense point voltages; and a minimum voltage tracking circuit configured to receive the plurality of sense point voltages and provide an output voltage which tracks whichever sense point voltage of the plurality of sense point voltages is currently a minimum sense point voltage. The comparator receives the output voltage at the second input and asserts the under-voltage indicator when the output voltage is below the reference voltage.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: May 9, 2023
    Assignee: NXP B.V.
    Inventors: Andre Luis Vilas Boas, Bruno Caceres Carrilho, Andre Gunther, Jeffrey Alan Goswick
  • Publication number: 20220341975
    Abstract: An integrated circuit including a comparator having a first input to receive a reference voltage, a second input, and an output to provide an under-voltage indicator. Sense points are configured to provide a plurality of sense point voltages, each sense point providing a corresponding sense point voltage of the plurality of sense point voltages; and a minimum voltage tracking circuit configured to receive the plurality of sense point voltages and provide an output voltage which tracks whichever sense point voltage of the plurality of sense point voltages is currently a minimum sense point voltage. The comparator receives the output voltage at the second input and asserts the under-voltage indicator when the output voltage is below the reference voltage.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 27, 2022
    Inventors: Andre Luis Vilas Boas, Bruno Caceres Carrilho, Andre Gunther, Jeffrey Alan Goswick
  • Publication number: 20220159577
    Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 19, 2022
    Inventors: Chia Yiaw Chong, Pablo Luis Vila Rodriguez, Sajeev Alakkatt Paleri, Qiong Wu, Kai Bai, Hsin-Yuo Liu, Peter M. Agboh, Derek Keith Shaeffer, Daya Krishna
  • Publication number: 20220078716
    Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Inventors: Chia Yiaw Chong, Pablo Luis Vila Rodriguez, Sajeev Alakkatt Paleri, Qiong Wu, Kai Bai, Hsin-Yuo Liu, Peter M. Agboh, Derek Keith Shaeffer, Daya Krishna
  • Patent number: 11272457
    Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: March 8, 2022
    Assignee: Apple Inc.
    Inventors: Chia Yiaw Chong, Pablo Luis Vila Rodriguez, Sajeev Alakkatt Paleri, Qiong Wu, Kai Bai, Hsin-Yuo Liu, Peter M. Agboh, Derek Keith Shaeffer, Daya Krishna
  • Patent number: 11171562
    Abstract: Multi-sense point voltage regulator systems are provided for usage in conjunction with power-regulated devices, such as system-on-chip and microcontroller unit devices. In embodiments, the multi-sense point voltage regulator system includes a multiplexer selector circuit and a voltage regulator. The multiplexer selector circuit is configured to: (i) monitor a local voltages at multiple sense points within an integrated circuit (IC) die circuit structure; and (ii) generate a feedback voltage indicative of a lowest one of the monitored local voltages. The voltage regulator is configured to generate a regulated power supply output voltage as a function of a differential between the feedback voltage and the reference voltage, with the regulated power supply output voltage provided to the IC die circuit structure to drive operation thereof.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: November 9, 2021
    Assignee: NXP USA, INC.
    Inventors: Andre Luis Vilas Boas, Marcelo Fukui, Andre Gunther
  • Patent number: 11106231
    Abstract: An integrated circuit (IC) is disclosed that includes a load circuit, and a voltage regulator circuit configured to provide a load voltage and a load current to the load circuit. The voltage regulator circuit can regulate the load voltage based on the load current.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 31, 2021
    Assignee: NXP USA, Inc.
    Inventors: Vitor Moreira Gomes, Ricardo Pureza Coimbra, Andre Luis Vilas Boas
  • Patent number: 10979033
    Abstract: A current-controlled oscillator receives an input current. Ramp voltage generating circuitry generates first and second ramp voltages in response to the input current. Selecting circuitry selects one of the first and second ramp voltages depending on their relative values. Switching circuitry receives a selected ramp voltage, generates a signal based on the selected ramp voltage relative to a reference voltage, and outputs a clock signal. In one embodiment, a comparator receives the reference voltage, one of the first and second ramp voltages, and outputs a comparison signal. Logic circuitry controls the ramp voltage generating circuitry to output one of the ramp voltages during one half of a clock cycle and to output the other ramp voltage during another half cycle of the clock signal based on the comparison signal and logic states of the logic circuitry.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 13, 2021
    Assignee: NXP USA, Inc.
    Inventors: Andre Luis Vilas Boas, Felipe Ricardo Clayton
  • Publication number: 20200358428
    Abstract: A current-controlled oscillator receives an input current. Ramp voltage generating circuitry generates first and second ramp voltages in response to the input current. Selecting circuitry selects one of the first and second ramp voltages depending on their relative values. Switching circuitry receives a selected ramp voltage, generates a signal based on the selected ramp voltage relative to a reference voltage, and outputs a clock signal. In one embodiment, a comparator receives the reference voltage, one of the first and second ramp voltages, and outputs a comparison signal. Logic circuitry controls the ramp voltage generating circuitry to output one of the ramp voltages during one half of a clock cycle and to output the other ramp voltage during another half cycle of the clock signal based on the comparison signal and logic states of the logic circuitry.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Andre Luis Vilas Boas, Felipe Ricardo Clayton
  • Patent number: 10742052
    Abstract: An apparatus and method for synchronously discharging multiple capacitive loads. In one embodiment, the apparatus includes first and second discharge circuits for discharging first and second capacitive loads, respectively. The apparatus also includes a control circuit coupled to the first and second discharge circuits and configured to control the second discharge circuit. The control circuit includes a first scaler circuit configured to generate a first scaled voltage based on a first voltage on the first capacitive load, a second scaler circuit configured to generate a second scaled voltage based on a second voltage on the second capacitive load, and a comparator circuit for comparing the first and second scaled voltages. The comparator circuit asserts a control signal when the second scaled voltage exceeds the first scaled voltage. The second discharge circuit discharges the second capacitive load when the comparator circuit asserts its control signal.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: August 11, 2020
    Assignee: NXP USA, Inc.
    Inventors: Marcos Mauricio Pelicia, Andre Luis Vilas Boas
  • Patent number: 10734975
    Abstract: A current-controlled oscillator receives an input current. Ramp voltage generating circuitry generates first and second ramp voltages in response to the input current. Selecting circuitry selects one of the first and second ramp voltages depending on their relative values. Switching circuitry receives a selected ramp voltage, generates a signal based on the selected ramp voltage relative to a reference voltage, and outputs a clock signal. In one embodiment, a comparator receives the reference voltage, one of the first and second ramp voltages, and outputs a comparison signal. Logic circuitry controls the ramp voltage generating circuitry to output one of the ramp voltages during one half of a clock cycle and to output the other ramp voltage during another half cycle of the clock signal based on the comparison signal and logic states of the logic circuitry.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: August 4, 2020
    Assignee: NXP USA, Inc.
    Inventors: Andre Luis Vilas Boas, Felipe Ricardo Clayton
  • Patent number: 10444778
    Abstract: A voltage regulator circuit that regulates voltage on an output node that provides power to a load circuit having varying current draw. A feedback voltage from the output node is compared to reference voltages. In response to the comparisons, pull-up/down circuits are applied to a gate-control node connected to the gate of a pass transistor. The voltage of the gate-control node is adjusted by integrating current from the pull-up/down circuits. In response to the feedback voltage being between the first and second reference voltages, the voltage on the gate-control node is maintained by disabling the pull-up/down circuits at the gate-control node.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: October 15, 2019
    Assignee: NXP USA, Inc.
    Inventors: Andre Luis Vilas Boas, Dale McQuirk, Miten Nagda, Richard Titov Lara Saez
  • Patent number: 10243456
    Abstract: A voltage regulator includes first and second bias circuits, a transistor, and a load prediction circuit. The transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode for providing a regulated output voltage, and a control electrode. The first biasing circuit is for providing a first bias voltage to the control electrode of the transistor in response to a feedback signal generated from the regulated output voltage. The second biasing circuit is for providing a second bias voltage to the control electrode of the transistor in response to a control signal. The load current prediction circuit is coupled to the second biasing circuit. The load prediction circuit is for providing the control signal to the second biasing circuit in response to determining that a load current at the second current electrode is expected to increase.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: March 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Marcos Mauricio Pelicia, Andre Luis Vilas Boas, Richard Titov Lara Saez