Patents by Inventor Luka Dejanovic

Luka Dejanovic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11397624
    Abstract: A data processing system including a data processor which is operable to execute programs to perform data processing operations and in which execution threads executing a program to perform data processing operations may be grouped together into thread groups. The data processor comprises a cross-lane permutation circuit which is operable to perform processing for cross-lane instructions which require data to be permuted (copied or moved) between the threads of a thread group. The cross-lane permutation circuit has plural data lanes between which data may be permuted (moved or copied). The number of data lanes is fewer than the number of threads in a thread group.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: July 26, 2022
    Assignee: Arm Limited
    Inventors: Luka Dejanovic, Mladen Wilder
  • Publication number: 20210157600
    Abstract: A data processor is disclosed in which groups of execution threads can execute a set of instructions in lockstep, and in which a plurality of execution lanes can perform processing operations for the execution threads. Two or more execution threads of a thread group are issued to the same execution lane for execution. The two or more execution threads can then be processed by the execution lane successively, such that the execution lane performs the same processing operation successively. This can have the effect of reducing signal transitions, such that the overall energy consumption of the data processor can be reduced.
    Type: Application
    Filed: November 26, 2019
    Publication date: May 27, 2021
    Applicant: Arm Limited
    Inventors: Luka Dejanovic, William Robert Stoye
  • Patent number: 11016774
    Abstract: A data processor is disclosed in which groups of execution threads can execute a set of instructions in lockstep, and in which a plurality of execution lanes can perform processing operations for the execution threads. Two or more execution threads of a thread group are issued to the same execution lane for execution. The two or more execution threads can then be processed by the execution lane successively, such that the execution lane performs the same processing operation successively. This can have the effect of reducing signal transitions, such that the overall energy consumption of the data processor can be reduced.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 25, 2021
    Assignee: Arm Limited
    Inventors: Luka Dejanovic, William Robert Stoye
  • Publication number: 20200233726
    Abstract: A data processing system including a data processor which is operable to execute programs to perform data processing operations and in which execution threads executing a program to perform data processing operations may be grouped together into thread groups. The data processor comprises a cross-lane permutation circuit which is operable to perform processing for cross-lane instructions which require data to be permuted (copied or moved) between the threads of a thread group. The cross-lane permutation circuit has plural data lanes between which data may be permuted (moved or copied). The number data lanes is fewer than the number of threads in a thread group.
    Type: Application
    Filed: January 22, 2019
    Publication date: July 23, 2020
    Applicant: Arm Limited
    Inventors: Luka Dejanovic, Mladen Wilder