Patents by Inventor Lukas Ossowski

Lukas Ossowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8749075
    Abstract: An integrated circuit is provided. The integrated circuit includes: a chip and encapsulation material covering at least three sides of the chip, the encapsulation material being formed from adhesive material. The integrated circuit includes a carrier adhered to the chip by means of the encapsulation material.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Lukas Ossowski, Khalil Hosseini, Ivan Nikitin
  • Publication number: 20140061878
    Abstract: An integrated circuit is provided. The integrated circuit includes: a chip and encapsulation material covering at least three sides of the chip, the encapsulation material being formed from adhesive material. The integrated circuit includes a carrier adhered to the chip by means of the encapsulation material.
    Type: Application
    Filed: September 4, 2012
    Publication date: March 6, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Joachim Mahler, Lukas Ossowski, Khalil Hosseini, Ivan Nikitin
  • Publication number: 20130264721
    Abstract: The electronic module includes a first carrier and a first semiconductor chip arranged on the first carrier. A second semiconductor chip is arranged above the first semiconductor chip. A material layer adheres the second semiconductor chip to the first carrier and encapsulates the first semiconductor chip.
    Type: Application
    Filed: April 5, 2012
    Publication date: October 10, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Stefan Landau, Joachim Mahler, Khalil Hosseini, Ivan Nikitin, Thomas Wowra, Lukas Ossowski
  • Patent number: 7988794
    Abstract: A semiconductor device having a topology adjustment and a method for adjusting the topology of a semiconductor device. The semiconductor device includes a semiconductor wafer having first and second opposing sides with an active area formed on a first portion of the first side having a topology extending a first distance above the first side. A support member is attached to a second portion of the first side and extending a second distance above the first side, wherein the first distance is about the same as the second distance. In some exemplary embodiments, the support member is formed by applying adhesive to the second portion. The wafer is then spun to adjust the second distance.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: August 2, 2011
    Assignee: Infineon Technologies AG
    Inventors: Werner Kroninger, Josef Schwaiger, Ludwig Schneider, Lukas Ossowski
  • Publication number: 20080185715
    Abstract: A semiconductor device having a topology adjustment and a method for adjusting the topology of a semiconductor device. The semiconductor device includes a semiconductor wafer having first and second opposing sides with an active area formed on a first portion of the first side having a topology extending a first distance above the first side. A support member is attached to a second portion of the first side and extending a second distance above the first side, wherein the first distance is about the same as the second distance. In some exemplary embodiments, the support member is formed by applying adhesive to the second portion. The wafer is then spun to adjust the second distance.
    Type: Application
    Filed: February 7, 2007
    Publication date: August 7, 2008
    Applicant: Infineon Technologies AG
    Inventors: Werner Kroninger, Josef Schwaiger, Ludwig Schneider, Lukas Ossowski