Patents by Inventor Lukas Perktold

Lukas Perktold has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10972059
    Abstract: A MEMS sensor (1) comprises a MEMS transducer (10) being coupled to a MEMS interface circuit (20). The MEMS interface circuit (20) comprises a bias voltage generator (100), a differential amplifier (200), a capacitor (300) and a feedback control circuit (400). The bias voltage generator (100) generates a bias voltage (Vbias) for operating the MEMS transducer. The variable capacitor (300) is connected to one of the input nodes (I200a) of the differential amplifier (200). At least one of the output nodes (A200a, A200b) of the differential amplifier is coupled to a base terminal (T110) of an output filter (110) of the bias voltage generator (100). Any disturbing signal from the bias voltage generator (100) is a common-mode signal that is divided equally on the input nodes (I200a, I200b) of the differential amplifier (200) and is therefore rejected.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: April 6, 2021
    Assignee: AMS INTERNATIONAL AG
    Inventors: Thomas Froehlich, Mark Niederberger, Colin Steele, Rene Scheuner, Thomas Christen, Lukas Perktold, Duy-Dong Pham
  • Publication number: 20210067881
    Abstract: An interface circuit comprises a signal path including a front-end charge amplifier coupling an input of the interface circuit to an output of the interface circuit, and a DC control loop separate from the signal path. In some implementations, the interface circuit is part of a MEMS sensor that includes a MEMS transducer having an output coupled to the input of the interface circuit. The interface circuit can, in some cases, allow faster settling of the circuit to its steady-state operating point.
    Type: Application
    Filed: October 17, 2018
    Publication date: March 4, 2021
    Inventors: Mark Niederberger, Lukas Perktold
  • Publication number: 20200252729
    Abstract: A sensor arrangement comprises a first capacitive sensor with a first and a second terminal, a second capacitive sensor with a first and a second terminal, a charge pump arrangement coupled to the first terminal of the first capacitive sensor and to the first terminal of the second capacitive sensor, and a differential output. The differential output comprises a first terminal coupled to the second terminal of the first capacitive sensor and a second terminal coupled to the second terminal of the second capacitive sensor. The first and the second capacitive sensor having opposite geometric orientation.
    Type: Application
    Filed: February 5, 2020
    Publication date: August 6, 2020
    Inventors: Simon MUELLER, Lukas PERKTOLD
  • Patent number: 10615753
    Abstract: An amplifier circuit (AC) for amplifying an output signal (OS) of a capacitive sensor (M) comprises a first input terminal (AIN) to receive the output signal (OS) of the capacitive sensor (M) and a second input terminal (BIN) to receive a bias voltage (Vbias) of the capacitive sensor (M). The amplifier circuit (AC) comprises an amplifier (A) for amplifying the output signal (OS) and a control circuit (CF) arranged in a feedback loop (FL) of the amplifier (A) being configured to control a DC voltage level at an input connection (A1) of the amplifier (A). A bias voltage sensing circuit (BVS) senses a change of the level of the bias voltage (Vbias) at the second input terminal (BIN) and changes the bandwidth of the feedback loop (FL) in dependence on the sensed change of the level of the bias voltage (Vbias).
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: April 7, 2020
    Assignee: ams AG
    Inventors: Lukas Perktold, Mark Niederberger, René Scheuner
  • Publication number: 20190356282
    Abstract: A MEMS sensor (1) comprises a MEMS transducer (10) being coupled to a MEMS interface circuit (20). The MEMS interface circuit (20) comprises a bias voltage generator (100), a differential amplifier (200), a capacitor (300) and a feedback control circuit (400). The bias voltage generator (100) generates a bias voltage (Vbias) for operating the MEMS transducer. The variable capacitor (300) is connected to one of the input nodes (I200a) of the differential amplifier (200). At least one of the output nodes (A200a, A200b) of the differential amplifier is coupled to a base terminal (T110) of an output filter (110) of the bias voltage generator (100). Any disturbing signal from the bias voltage generator (100) is a common-mode signal that is divided equally on the input nodes (I200a, I200b) of the differential amplifier (200) and is therefore rejected.
    Type: Application
    Filed: October 24, 2017
    Publication date: November 21, 2019
    Inventors: Thomas Froehlich, Mark Niederberger, Colin Steele, Rene Scheuner, Thomas Christen, Lukas Perktold, Duy-Dong Pham
  • Publication number: 20190036490
    Abstract: An amplifier circuit (AC) for amplifying an output signal (OS) of a capacitive sensor (M) comprises a first input terminal (AIN) to receive the output signal (OS) of the capacitive sensor (M) and a second input terminal (BIN) to receive a bias voltage (Vbias) of the capacitive sensor (M). The amplifier circuit (AC) comprises an amplifier (A) for amplifying the output signal (OS) and a control circuit (CF) arranged in a feedback loop (FL) of the amplifier (A) being configured to control a DC voltage level at an input connection (A1) of the amplifier (A). A bias voltage sensing circuit (BVS) senses a change of the level of the bias voltage (Vbias) at the second input terminal (BIN) and changes the bandwidth of the feedback loop (FL) in dependence on the sensed change of the level of the bias voltage (Vbias).
    Type: Application
    Filed: January 10, 2017
    Publication date: January 31, 2019
    Inventors: Lukas PERKTOLD, Mark NIEDERBERGER, René BLATTMANN
  • Publication number: 20110158352
    Abstract: A multi-stage demodulation circuit receives a given communication signal modulated by a superposition of at least a first modulation scheme and a second modulation scheme, the circuit having a first demodulation stage that demodulates the received communication signal according to the first demodulation scheme, and generates one or more bits representing the first modulation state of the signal. An intermediate demodulation circuit removes the first modulation from the received communication signal to generate an intermediate demodulation signal having only the second modulation. A second demodulation stage demodulates the intermediate demodulation signal according to the second demodulation scheme and generates one or more additional bits representing the second modulation state of the given communication signal.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: NXP B.V.
    Inventors: Harald Witschnig, Lukas Perktold