Patents by Inventor Lukas Valek

Lukas Valek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150926
    Abstract: A crucible for manufacturing semiconductor crystals may be disposed adjacent to a heating element. The crucible may include a first seed crystal site and a second seed crystal site at opposed ends of the crucible. A compartment may be defined between an outer wall and an inner wall of the crucible, where the inner wall is formed with a porous graphite membrane. Source powder loaded into the compartment may then be heated by the heating element to sublimate and diffuse from the compartment and through the inner wall to provide crystal growth of a first seed crystal at the first seed crystal site and of a second seed crystal at the second seed crystal site.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Radek JESKO, Lukas VALEK, Jan TESIK
  • Publication number: 20150333016
    Abstract: In one embodiment, methods for making semiconductor devices are disclosed.
    Type: Application
    Filed: July 29, 2015
    Publication date: November 19, 2015
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jan Sik, Petr Kostelník, Lukás Válek, Michal Lorenc, Milos Pospísil, David Lysácek, John Michael Parsey, JR.
  • Patent number: 8846500
    Abstract: At least one exemplary embodiment is directed to a method of forming a multilayered gettering structure that can be used to control wafer warpage.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: David Lysacek, Jana Vojtechovska, Lubomir Dornak, Petr Kostelnik, Lukas Valek, Petr Panek
  • Publication number: 20140264761
    Abstract: In one embodiment, methods for making semiconductor devices are disclosed.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 18, 2014
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jan Sik, Petr Kostelník, Lukás Válek, Michal Lorenc, Milos Pospìsil, David Lysácek, John Michael Parsey, JR.
  • Publication number: 20120146024
    Abstract: At least one exemplary embodiment is directed to a method of forming a multilayered Bettering structure that can be used to control wafer warpage.
    Type: Application
    Filed: December 13, 2010
    Publication date: June 14, 2012
    Inventors: David Lysacek, Jana Vojtechovska, Lubomir Dornak, Petr Kostelnik, Lukas Valek, Petr Panek
  • Patent number: 7737004
    Abstract: In one embodiment, a multi-layer extrinsic gettering structure includes plurality of polycrystalline semiconductor layers each separated by a dielectric layer.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: June 15, 2010
    Assignee: Semiconductor Components Industries LLC
    Inventors: David Lysacek, Michal Lorenc, Lukas Valek
  • Publication number: 20080003782
    Abstract: In one embodiment, a multi-layer extrinsic gettering structure includes plurality of polycrystalline semiconductor layers each separated by a dielectric layer.
    Type: Application
    Filed: July 3, 2006
    Publication date: January 3, 2008
    Inventors: David Lysacek, Michal Lorenc, Lukas Valek