Patents by Inventor Luke D. Remis
Luke D. Remis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8959264Abstract: A method auto-switches interfaces between a client computer and subsystems in a device under management. A first output bus from a first subsystem is coupled to a client computer via a multiplexer, wherein the first subsystem is a subsystem from multiple system subsystems in the device under management. A hardware subsystem bus monitor monitors all output busses from the multiple system subsystems for a predetermined event on a bus. In response to the predetermined event being detected on a second output bus from a second subsystem in the device under management, the multiplexor decouples the first output bus from the client computer and couples the second output bus to the client computer.Type: GrantFiled: May 16, 2013Date of Patent: February 17, 2015Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Michael Decesaris, Steven C. Jacobson, Luke D. Remis, Gregory D. Sellman
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Patent number: 8959380Abstract: Optimizing an I2C bus frequency, the bus including signal lines coupling a master and slave nodes, a signal line coupled to a rise time detection circuit monitoring a voltage of the signal line, the voltage alternating between a logic low and logic high, where optimizing the frequency includes: detecting, during a rise in the signal line, a first voltage, the first voltage being greater than the logic low voltage; starting a counter to increment once for each clock period of the circuit; detecting a second voltage on the signal line, the second voltage greater than the first and less than the logic high; stopping the counter; calculating, in dependence upon the clock period and the counter value, a rise time; determining whether the rise time is greater than a maximum threshold; and increasing the I2C bus frequency if the calculated rise time is greater than the maximum threshold.Type: GrantFiled: May 9, 2012Date of Patent: February 17, 2015Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Michael Decesaris, Steven C. Jacobson, Luke D. Remis, Gregory D. Sellman
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Patent number: 8958784Abstract: Embodiments of the present invention provide a method, system and computer program product for telephone call co-processing in a mobile telephony environment. In an embodiment of the invention, a method of telephone call co-processing in a mobile telephony environment is provided. The method includes monitoring a resource state of a selected mobile telephone, such as cellular network signal strength or battery charge. The method additionally includes detecting weakness of the resource state sufficient to inhibit the maintenance of a telephone call in the selected mobile telephone. Finally, the method includes, in response to detecting weakness of the resource state, identifying a different mobile telephone proximate to the selected mobile telephone and utilizing the different mobile telephone to process a telephone call.Type: GrantFiled: May 2, 2012Date of Patent: February 17, 2015Assignee: International Business Machines CorporationInventors: Jordan Chin, Eric R. Kern, Luke D. Remis, Sarah E. Smith, Timothy M. Wiwel
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Publication number: 20150046628Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.Type: ApplicationFiled: August 7, 2013Publication date: February 12, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
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Publication number: 20150046615Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.Type: ApplicationFiled: August 8, 2013Publication date: February 12, 2015Applicant: International Business Machines CorporationInventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
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Patent number: 8954634Abstract: Operating a demultiplexer on an I2C bus, the demultiplexer including a set of input signal lines from an I2C master and a plurality of sets of output signal lines, the demultiplexer configured to couple the inputs among the output in dependence upon a demultiplexer select signal line that couples the demultiplexer to a rise time detection circuit, where the rise time detection circuit is also coupled to the input signal lines and the rise time detection circuit: monitors a voltage of at least one of the input signal lines, including: receiving, from the I2C master, a signal on one of the lines; and detecting rise time of the signal; and if the rise time of the signal is less than a predefined threshold, configuring the demultiplexer to vary the coupling of the input signal lines from a first set of outputs to a second set.Type: GrantFiled: June 22, 2012Date of Patent: February 10, 2015Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Michael DeCesaris, Steven C. Jacobson, Luke D. Remis, Gregory D. Sellman
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Patent number: 8954619Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.Type: GrantFiled: August 7, 2013Date of Patent: February 10, 2015Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
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Publication number: 20150026374Abstract: A hardware system comprises a digital signal generator, which generates a digital electrical signal that describes a first physical state of a first device; an analog electrical signal generator, which generates an analog electrical signal that describes a second physical state of the first device; a hybrid digital state signal generator, which generates a hybrid digital state signal that comprises the analog electrical signal overlaid onto the initial digital electric signal; and a hybrid signal transmitter, which transmits the hybrid digital state signal from the first device to a second device, wherein the second device comprises a hybrid signal receiver/decoder that extracts the analog electrical signal from the hybrid digital state signal.Type: ApplicationFiled: July 19, 2013Publication date: January 22, 2015Inventors: MICHAEL DECESARIS, JAMES J. PARSONESE, LUKE D. REMIS, GREGORY D. SELLMAN
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Publication number: 20150019782Abstract: A message is simultaneously broadcast to multiple systems on a 1-wire bus. A first addressed communication session is established between a microprocessor and a first 1-wire I/O expander via a 1-wire bus, where the first 1-wire I/O expander is electrically coupled to a first system. The first 1-wire I/O expander is placed into “fast access mode”, and then removed from the 1-wire bus by opening a switch to the 1-wire bus. A second addressed communication session is established between the microprocessor and a second 1-wire I/O expander before the switch recloses, where the second 1-wire I/O expander is electrically coupled to a second system. The second 1-wire I/O expander is then placed into “fast access mode”. In response to the timer expiring and the switch reclosing, an unaddressed message is broadcast from the microprocessor to the first and second systems via the first and second 1-wire I/O expanders.Type: ApplicationFiled: July 11, 2013Publication date: January 15, 2015Inventors: MICHAEL DECESARIS, JAMES J. PARSONESE, LUKE D. REMIS, KEVIN S. D. VERNON
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Patent number: 8930586Abstract: Disclosed herein are systems, methods, and apparatuses for identification of electronic devices within a computing system. According to an aspect, a method may be implemented at an electronic device comprising an input. The method may include setting, during a startup state, the input to indicate an identity of the electronic device. Further, the method may include determining an event for changing from the startup state to an operational state. The method may also include changing from the startup state to the operational state in response to determining the event.Type: GrantFiled: April 3, 2013Date of Patent: January 6, 2015Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: James J. Parsonese, Luke D. Remis, Kevin S. D. Vernon
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Patent number: 8928393Abstract: An apparatus comprising a temperature switch and a logic device, and a method of implementing multiple dynamic temperature thresholds. The temperature switch has a temperature sensor, a temperature threshold select input, and an output to a temperature threshold interrupt line, wherein the temperature switch selects a current temperature threshold from multiple predetermined temperature thresholds as determined by a state of the temperature threshold select input. The temperature switch causes an interrupt assertion on the temperature threshold interrupt line in response to the temperature sensor indicating a sensed temperature that exceeds the temperature threshold. The logic device has an input coupled to the temperature threshold interrupt line and a temperature threshold select output coupled to the temperature threshold select input of the temperature switch.Type: GrantFiled: October 30, 2013Date of Patent: January 6, 2015Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Milton Cobo, Michael DeCesaris, Eric E. Pettersen, Luke D. Remis
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Patent number: 8909844Abstract: In accordance with one embodiment of the invention, an I2C bus multiplexing circuit for use in an I2C bus interface can be provided. The I2C bus multiplexing circuit can facilitate multiplexer switching in an I2C bus interface by detecting a start command from an I2C master device via an I2C bus, buffering data from the I2C master device, detecting a clock frequency of a bus serial clock (SCL) line of the I2C master device, holding the serial data (SDA) line of the I2C master device in a clock stretch state and selecting a port based on the detected clock frequency of the SCL of the I2C master device. The method further can include sending the buffered data to an I2C slave device on the selected port. The method further can include receiving an acknowledgement from the I2C slave device on the selected port.Type: GrantFiled: July 4, 2012Date of Patent: December 9, 2014Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Michael DeCesaris, Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden
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Publication number: 20140359313Abstract: An approach is described for implementing an air tube button in a computing system. An associated apparatus may include an air tube having an aperture located on a panel of the computing system. The apparatus further may include an airflow sensor located in the air tube and a fan configured for facilitating airflow though the air tube. The airflow sensor may be an anemometer, an air pressure gauge, or a mass flow meter. The apparatus further may include a service processor subsystem connected to the airflow sensor. The service processor subsystem may be configured for implementing a virtual signal having a default logical high value. The service processor subsystem further may be configured for establishing a baseline value by determining average airflow detected by the airflow sensor over a unit of time and commencing sampling of the airflow sensor to obtain airflow values at uniform time intervals.Type: ApplicationFiled: June 3, 2013Publication date: December 4, 2014Inventors: Keith M. CAMPBELL, William M. MEGARITY, Luke D. REMIS, Gregory D. SELLMAN
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Patent number: 8900008Abstract: A universal press-fit connection allows a component having a connector pin to be connected to a compatible plated through hole of a circuit board regardless of circuit board thickness. The connector pin includes a proximate end adjacent the component, a distal end with a fork lock, and a compliant portion between the proximate and distal ends. A multi-width through hole includes a first portion partially extending through the circuit board and a second, wider portion extending beyond the first portion. The fork lock initially moves radially inward upon insertion into the first portion via flexing of the compliant portion, and re-expands when entering the second portion. The compliant portion engages the through hole and the fork lock secures the connector pin in the through hole.Type: GrantFiled: May 25, 2012Date of Patent: December 2, 2014Assignee: International Business Machines CorporationInventors: James A. Day, Jr., Zachary B. Durham, Luke D. Remis, Tony C. Sass, Gregory D. Sellman
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Patent number: 8902611Abstract: A computer processor retention device comprises a load frame, a load plate, and a pair of retractable cover members. The load frame may be secured to a circuit board around a processor mounting site. The load plate is pivotally coupled to the load frame and is pivotable between being open for receiving a processor at the processor mounting site and closed in engagement with a periphery of the received processor. The load plate has a window that is open to the processor mounting site when the load plate is closed. The retractable cover members span the window and are alternately movable along a track toward one another to cover the processor mounting site and away from one another to expose the processor mounting site.Type: GrantFiled: September 12, 2012Date of Patent: December 2, 2014Assignee: International Business Machines CorporationInventors: Jeremy S. Bridges, Steven C. Jacobson, Luke D. Remis, Gregory D. Sellman
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Patent number: 8904078Abstract: A serial peripheral interface (SPI) system including a bus adapter is disclosed. The bus adapter may include a data converter that may be adapted to receive respective first and second data from a first master output peripheral input (MOPI) line and a chip select line from a SPI master device. The data converter may also be adapted to interleave the first and second data, and the data converter may be adapted to transmit the interleaved first and second data synchronously with a second clock signal on a second MOPI line. The bus adapter may also include a clock rate adjuster adapted to generate the second clock signal to transmit to a SPI peripheral device. The second clock signal may be adapted to enable the SPI peripheral device to read the transmitted data.Type: GrantFiled: October 22, 2012Date of Patent: December 2, 2014Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Michael DeCesaris, Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden
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Patent number: 8898358Abstract: A method, device and computer program product for providing multi-protocol communication on an inter-integrated circuit (I2C) bus. The method for providing multi-protocol communication on an inter-integrated circuit (I2C) bus can include issuing a start command by a bus management device onto the I2C bus. Thereafter, the bus management device can send an embedded differential protocol to a non-I2C device. Once communication with the non-I2C device is completed, the bus management device can issue a stop command to release the I2C bus. In one aspect of this embodiment, the method can include receiving a response from the non-I2C device.Type: GrantFiled: July 4, 2012Date of Patent: November 25, 2014Assignee: International Business Machines CorporationInventors: Michael DeCesaris, Pravin S. Patel, Luke D. Remis, Gregory D. Sellman
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Publication number: 20140344487Abstract: A method auto-switches interfaces between a client computer and subsystems in a device under management. A first output bus from a first subsystem is coupled to a client computer via a multiplexer, wherein the first subsystem is a subsystem from multiple system subsystems in the device under management. A hardware subsystem bus monitor monitors all output busses from the multiple system subsystems for a predetermined event on a bus. In response to the predetermined event being detected on a second output bus from a second subsystem in the device under management, the multiplexor decouples the first output bus from the client computer and couples the second output bus to the client computer.Type: ApplicationFiled: May 16, 2013Publication date: November 20, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: MICHAEL DECESARIS, STEVEN C. JACOBSON, LUKE D. REMIS, GREGORY D. SELLMAN
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Publication number: 20140306528Abstract: A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source.Type: ApplicationFiled: April 12, 2013Publication date: October 16, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: MICHAEL DECESARIS, JAMES J. PARSONESE, LUKE D. REMIS, GREGORY D. SELLMAN, STEVEN L. VANDERLINDEN
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Publication number: 20140304432Abstract: Disclosed herein are systems, methods, and apparatuses for identification of electronic devices within a computing system. According to an aspect, a method may be implemented at an electronic device comprising an input. The method may include setting, during a startup state, the input to indicate an identity of the electronic device. Further, the method may include determining an event for changing from the startup state to an operational state. The method may also include changing from the startup state to the operational state in response to determining the event.Type: ApplicationFiled: April 3, 2013Publication date: October 9, 2014Applicant: International Business Machines CorporationInventors: James J. Parsonese, Luke D. Remis, Kevin S. D. Vernon