Patents by Inventor Luke Graham

Luke Graham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230011618
    Abstract: Zero-ascend omnispecies (ZAO) attraction system includes a fish passage attraction module that can be deployed in a fishway where water flows downstream. The fish passage attraction module includes a body having a first end and an opposite second end, first adaptor adjacent the first end and second adaptor adjacent the second end. The adaptors are configured to alter water flow fields downstream of the module so as to attract fish to an entrance thereof.
    Type: Application
    Filed: July 8, 2022
    Publication date: January 12, 2023
    Inventors: David J. Duquette, Katherine Leighton, Luke Graham, Vince Bryan
  • Patent number: 10693277
    Abstract: A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: June 23, 2020
    Assignee: II-VI Delaware Inc.
    Inventors: Luke A. Graham, Sonia Quadery, Deepa Gazula, Haiquan Yang
  • Patent number: 10644482
    Abstract: An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: May 5, 2020
    Assignee: Finisar Corporation
    Inventors: Luke Graham, Andy MacInnes
  • Publication number: 20190393678
    Abstract: A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.
    Type: Application
    Filed: August 6, 2019
    Publication date: December 26, 2019
    Inventors: Luke A. Graham, Sonia Quadery, Deepa Gazula, Haiquan Yang
  • Patent number: 10374391
    Abstract: A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: August 6, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Luke A. Graham, Sonia Quadery, Deepa Gazula, Haiquan Yang
  • Publication number: 20190207369
    Abstract: An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.
    Type: Application
    Filed: March 12, 2019
    Publication date: July 4, 2019
    Inventors: Luke Graham, Andy MacInnes
  • Patent number: 10230215
    Abstract: An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: March 12, 2019
    Assignee: FINISAR CORPORATION
    Inventors: Luke Graham, Andy MacInnes
  • Publication number: 20180090909
    Abstract: A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 29, 2018
    Inventors: Luke A. Graham, Sonia Quadery, Deepa Gazula, Haiquan Yang
  • Publication number: 20180041009
    Abstract: An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 8, 2018
    Inventors: Luke Graham, Andy MacInnes
  • Patent number: 9318872
    Abstract: A VCSEL can include a graphene intra-cavity absorber having at least one graphene region and at least one dielectric region adjacent to the graphene region. The VCSEL can also include a graphene electrode electronically coupled with at least one graphene region. The VCSEL can also include a contact region adjacent with at least one dielectric region. The VCSEL can also include a contact electrode electronically coupled with the contact region. The VCSEL can also include a base electrode electronically coupled with a base of a semiconductor region of the VCSEL. The graphene intra-cavity absorber can include at least two graphene regions sandwiching at least one dielectric region therebetween.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: April 19, 2016
    Assignee: FINISAR CORPORATION
    Inventors: Luke A. Graham, Ralph H. Johnson, James K. Guenter
  • Publication number: 20150194789
    Abstract: A VCSEL can include a graphene intra-cavity absorber having at least one graphene region and at least one dielectric region adjacent to the graphene region. The VCSEL can also include a graphene electrode electronically coupled with at least one graphene region. The VCSEL can also include a contact region adjacent with at least one dielectric region. The VCSEL can also include a contact electrode electronically coupled with the contact region. The VCSEL can also include a base electrode electronically coupled with a base of a semiconductor region of the VCSEL. The graphene intra-cavity absorber can include at least two graphene regions sandwiching at least one dielectric region therebetween.
    Type: Application
    Filed: January 5, 2015
    Publication date: July 9, 2015
    Inventors: Luke A. Graham, Ralph H. Johnson, James K. Guenter
  • Patent number: 8442365
    Abstract: An optical subassembly for low-feedback coupling of light from a light source into an optical waveguide such as an optical fiber is described. The optical subassembly has an aspherical lens with surface sag having a rotationally symmetrical sag component without having a cone sag component, and a rotationally asymmetrical helical component for reducing coupling of light reflected from the optical fiber tip back into the laser aperture by causing a significant portion of the reflected light to encircle the laser aperture. The lens shape and the height of the helix are selected so that tight focusing onto the fiber tip is preserved, while the optical feedback is reduced.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: May 14, 2013
    Assignee: JDS Uniphase Corporation
    Inventor: Luke Graham
  • Publication number: 20120236891
    Abstract: A VCSEL can include: one or more quantum wells having (Al)InGaAs; two or more quantum well barriers having Al(In)GaAs bounding the one or more quantum well layers; and one or more transitional monolayers deposited between each quantum well layer and quantum well barrier, wherein the quantum wells, barriers and transitional monolayers are substantially devoid of traps. The one or more transitional monolayers include GaP, GaAs, and/or GaAsP. Alternatively, the VCSEL can include two or more transitional monolayers of AlInGaAs with a barrier-side monolayer having lower In and higher Al compared to a quantum well side monolayer that has higher In and lower Al.
    Type: Application
    Filed: March 19, 2012
    Publication date: September 20, 2012
    Applicant: FINISAR CORPORATION
    Inventors: Ralph H. Johnson, Jimmy Alan Tatum, Andrew N. MacInnes, Jerome K. Wade, Luke A. Graham
  • Publication number: 20100329605
    Abstract: An optical subassembly for low-feedback coupling of light from a light source into an optical waveguide such as an optical fiber is described. The optical subassembly has an aspherical lens with surface sag having a rotationally symmetrical sag component without having a cone sag component, and a rotationally asymmetrical helical component for reducing coupling of light reflected from the optical fiber tip back into the laser aperture by causing a significant portion of the reflected light to encircle the laser aperture. The lens shape and the height of the helix are selected so that tight focusing onto the fiber tip is preserved, while the optical feedback is reduced.
    Type: Application
    Filed: December 29, 2009
    Publication date: December 30, 2010
    Inventor: Luke GRAHAM
  • Patent number: 7802930
    Abstract: A device comprising: an optical subassembly has a lens rear surface including one or more facets for scattering at least some of the light transmitted through the lens rear surface.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: September 28, 2010
    Assignee: JDS Uniphase Corporation
    Inventors: Jack L. Jewell, Luke A. Graham
  • Patent number: 7796850
    Abstract: Optical systems comprise one or more optical pathways including lenses that are offset with respect to each other and lenses that are offset with respect to optical fibers.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: September 14, 2010
    Assignee: JDS Uniphase Corporation
    Inventors: Jack L. Jewell, Luke A. Graham
  • Publication number: 20090310915
    Abstract: Optical systems comprise one or more optical pathways including lenses that are offset with respect to each other and lenses that are offset with respect to optical fibers.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 17, 2009
    Applicant: JDS Uniphase Corporation
    Inventors: Jack L. Jewell, Luke A. Graham
  • Publication number: 20090252192
    Abstract: A device including a laser with reduced feedback.
    Type: Application
    Filed: April 8, 2008
    Publication date: October 8, 2009
    Applicant: JDS Uniphase Corporation
    Inventors: Jack L. Jewell, Luke A. Graham
  • Publication number: 20090226133
    Abstract: A device comprising: an optical subassembly has a lens rear surface including one or more facets for scattering at least some of the light transmitted through the lens rear surface.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Applicant: JDS Uniphase Corporation
    Inventors: Jack L. Jewell, Luke A. Graham
  • Publication number: 20060248885
    Abstract: An apparatus and method for controlling a work tool on a work machine are provided. The work machine may have first and second actuators, each actuator being operable in a vibratory mode and a non-vibratory mode, and each actuator being coupled to the work tool for changing the position of the work tool. The method may include simultaneously (i) operating the first actuator in a vibratory mode, (ii) operating the second actuator in a vibratory mode, and (iii) receiving a command to change the position of the work tool. The method may further include operating the first actuator in a non-vibratory mode to change the position of the work tool while operating the second actuator in a vibratory mode to vibrate the work tool, in response to receiving the command.
    Type: Application
    Filed: May 6, 2005
    Publication date: November 9, 2006
    Inventors: Jason Buckmier, Daniel Cockman, Luke Graham, Gilles Hoessler, David Messer, W. Most