Patents by Inventor Luke L. Chang
Luke L. Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7970953Abstract: In one aspect, a shared transport layer frame information structure (FIS) generation logic may generate FISes for each of a plurality of SATA ports. In a further aspect, a port addressing logic, in communication with the shared transport layer FIS generation logic, may select one of the SATA ports for each of the FISes.Type: GrantFiled: June 30, 2005Date of Patent: June 28, 2011Assignee: Intel CorporationInventors: Naichih Chang, Pak-Iung Seto, Luke L. Chang, Victor Lau
-
Patent number: 7738502Abstract: A noise filtering system provides adaptive noise filtering in the physical layer of serial and parallel interfaces for storage protocol applications. The system provides adaptive noise filtering for both hot plug and hot removal applications.Type: GrantFiled: September 1, 2006Date of Patent: June 15, 2010Assignee: Intel CorporationInventors: Naichih Chang, Pak-Lung Seto, Luke L. Chang
-
Patent number: 7650540Abstract: A method according to one embodiment may include communicating, by a far end device with a near end device, using a Serial ATA (SATA) communications protocol; receiving, by the far end device, a SATA signal sequence having two bits, the state of which define at least one loopback mode; defining, by the far end device, a reserved and/or error state if both of the bits are set; and processing, by the far end device, the two bits together to determine if the two bits are in a state that defines at least one loopback mode or if the two bits are set. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: GrantFiled: July 21, 2006Date of Patent: January 19, 2010Assignee: Intel CorporationInventors: Luke L. Chang, Pak-Lung Seto, Naichih Chang
-
Publication number: 20080056424Abstract: A noise filtering system provides adaptive noise filtering in the physical layer of serial and parallel interfaces for storage protocol applications. The system provides adaptive noise filtering for both hot plug and hot removal applications.Type: ApplicationFiled: September 1, 2006Publication date: March 6, 2008Inventors: Naichih Chang, Pak-Lung Seto, Luke L. Chang
-
Publication number: 20080019280Abstract: A method according to one embodiment may include communicating, by a far end device with a near end device, using a Serial ATA (SATA) communications protocol; receiving, by the far end device, a SATA signal sequence having two bits, the state of which define at least one loopback mode; defining, by the far end device, a reserved and/or error state if both of the bits are set; and processing, by the far end device, the two bits together to determine if the two bits are in a state that defines at least one loopback mode or if the two bits are set. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.Type: ApplicationFiled: July 21, 2006Publication date: January 24, 2008Inventors: Luke L. Chang, Pak-Lung Seto, Naichih Chang
-
Patent number: 6922718Abstract: A multi-point video conferencing system and method for managing display of images of multiple participating locations and bandwidth allocated for a multi-point video conference. The multi-point video conferencing system detects an audio signal associated with an image not currently displayed to each participating location in the multi-point video conference. When the number of active display windows is less than the maximum number of active display windows, a first active display window is activated and the image displayed in the first active display window. When the number of the active display windows is not less than the maximum number, a second active display window of the active display windows is inactivated, a third active display window is activated, and the image is displayed in the third active display window.Type: GrantFiled: February 1, 2002Date of Patent: July 26, 2005Assignee: Dell Products L.P.Inventor: Luke L. Chang
-
Patent number: 6618773Abstract: The present invention employs two unique identification files associated with the same dual-interface display monitor. Each identification file identifies one of the display monitor's two interfaces, so that each identification file identifies the display monitor as a separate display monitor, with a unique product code and its associated characteristics, to the computer system. When an initiating event occurs, such as a power on self test, hot plug-in, or reboot, the monitor responds to a request for its identification file with the digital identification file if the monitor is connected to the digital video connector and with the analog identification file if the monitor is connected to the analog video connector. If both connectors are connected, the monitor with send the digital identification file as a default. In the preferred embodiment, the identification files are EDID™ files.Type: GrantFiled: January 25, 2000Date of Patent: September 9, 2003Assignee: Dell USA L.P.Inventors: Luke L. Chang, Joe E. Goodart
-
Publication number: 20030149724Abstract: A multi-point video conferencing system and method for managing display of images of multiple participating locations and bandwidth allocated for a multi-point video conference. The multi-point video conferencing system detects an audio signal associated with an image not currently displayed to each participating location in the multi-point video conference. When the number of active display windows is less than the maximum number of active display windows, a first active display window is activated and the image displayed in the first active display window. When the number of the active display windows is not less than the maximum number, a second active display window of the active display windows is inactivated, a third active display window is activated, and the image is displayed in the third active display window.Type: ApplicationFiled: February 1, 2002Publication date: August 7, 2003Inventor: Luke L. Chang
-
Patent number: 6219039Abstract: Method and apparatus for testing the video subsystem of a PC in a manufacturing environment. Hsync and Vsync signals from a VGA connector of the PC are input to first and second trigger inputs, respectively, of a monostable multivibrator (“MM”) of the test device to drive respective outputs thereof. In particular, the presence of Hsync at the first trigger input triggers the MM to output a positive pulse at a first output thereof; similarly, the presence of Vsync at the second trigger input triggers the MM to output a positive pulse at a second output thereof. Each of the first and second outputs is used to drive an LED, such that the presence of Hsync and/or Vsync results in the illumination of a corresponding LED.Type: GrantFiled: January 26, 1999Date of Patent: April 17, 2001Assignee: Dell USA, L.P.Inventors: Luke L. Chang, Collin Cooke
-
Patent number: 5544309Abstract: A boundary scan system for a data processing system using serial scan techniques for diagnostics comprises gated circuitry for each adapter card slot for controlling the propagation of controller generated diagnostic signals throughout the data processing system and the components included on the system's planar and each adapter card present, adapted to serially scan all present adapter cards and to provide electrical conduit to the next serially connected component in the absence of a card at an adapter slot.Type: GrantFiled: April 22, 1993Date of Patent: August 6, 1996Assignee: International Business Machines CorporationInventors: Luke L. Chang, John J. Cazzolla, Kha D. Nguyen
-
Patent number: 5493651Abstract: A system and method is provided for dequeuing connection requests in a data communications system comprising a calling subsystem and a called subsystem connected by a serial simplex switch. The connection requests are made by the calling subsystem to the called subsystem by sending a connect request message to the switch and queuing the connect request message in a buffer therein. The switch establishes a connection between the calling subsystem and the called subsystem by thereafter queuing the connect request message in a buffer in the called subsystem. Concurrently, the switch sends a connect request acknowledge message to the calling subsystem while the calling subsystem sends a connect request dequeue message to the switch.Type: GrantFiled: February 16, 1993Date of Patent: February 20, 1996Assignee: International Business Machines CorporationInventors: Richard S. Crouse, John J. Cazzolla, Luke L. Chang, Marco M. Hurtado, Kha D. Nguyen, Jose L. Rivero, Jose J. Ruiz, Louis Salcedo
-
Patent number: 5317565Abstract: A sequencing scheme is provided for prioritizing bus operations occurring in simplex switches which interconnect subsystems in a data communications system, thereby yielding improved aggregate system data throughput. The sequencing scheme provides procedures which simultaneously accommodate (i) concurrently pending requests to a first control bus which processes only circuit switched operations and (ii) concurrently pending requests to a second control bus which processes only packet switched operations, in an order which optimizes link level control message throughput of the simplex switch. The control messages which are coordinated by the sequencing scheme include connect and disconnect requests, connect and disconnect request acknowledgments, and data acknowledgments.Type: GrantFiled: January 26, 1993Date of Patent: May 31, 1994Assignee: International Business Machines CorporationInventors: Richard S. Crouse, John J. Cazzolla, Luke L. Chang, Marco M. Hurtado, Kha D. Nguyen, Jose L. Rivero, Jose J. Ruiz, Louis Salcedo
-
Patent number: 5309426Abstract: A serial simplex switch design is provided which includes I/O ports each of which is configurable specifically for attachment to a data communications subsystem or, alternatively, for cascaded connection to a similarly configured I/O port on another switch. The switch provides a packet routing function including input and output buffers for each of its I/O ports wherein packets of control messages sent by one subsystem are temporarily stored prior to being delivered to the appropriate destination subsystem. When configured to be directly attached to a subsystem, the I/O ports separate control messages from incoming integrated data and control message strings. In a cascade configuration, however, a mechanism is provided wherein data and control messages are separated into two physical paths to eliminate the delays associated with integrated data and control message flow through the cascaded I/O port.Type: GrantFiled: January 26, 1993Date of Patent: May 3, 1994Assignee: International Business Machines CorporationInventors: Richard S. Crouse, John J. Cazzolla, Luke L. Chang, Marco M. Hurtado, Kha D. Nguyen, Jose L. Rivero, Jose J. Ruiz, Louis Salcedo