Patents by Inventor Luke Roberto

Luke Roberto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12223248
    Abstract: The present disclosure relates to electronic circuit design, and more specifically, to training a neural network to serve as the reward function for optimization-based approaches to PCB design automation. Embodiments may include generating, using a processor, one or more placed designs using a genetic optimization methodology including a reward function and adjusting the one or more placed designs and the reward function during the generating. Embodiments may further include routing the one or more placed designs using an auto-router to assign a routability score label and training a neural network, using the one or more placed designs and the routability score label, to extract one or more intermediate features from the one or more placed designs. Embodiments may also include predicting a routability of the PCB design based upon, at least in part, the one or more intermediate features.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: February 11, 2025
    Assignee: Cadence Design Systems, Inc.
    Inventors: Joydeep Mitra, John Robert Murphy, Zachary Joseph Zumbo, Luke Roberto, Taylor Elsom Hogan
  • Patent number: 11599699
    Abstract: The present disclosure relates to systems and methods for floorplanning using machine learning techniques. Embodiments may include receiving an electronic design and analyzing the electronic design using a reinforcement learning agent. Embodiments may further include recommending a first action wherein the first action includes at least one of a place agent action, a via agent action, or a route agent action. Embodiments may also include updating the electronic design based upon, at least in part, the first action to generate an updated electronic design. Embodiments may further include analyzing the updated electronic design using the reinforcement learning agent and recommending a second action wherein the second action includes at least one of a place agent action, a via agent action, or a route agent action. Embodiments may also include updating the updated electronic design based upon the second action to generate a second updated electronic design.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: March 7, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Luke Roberto, Joydeep Mitra, Taylor Elsom Hogan, Shang Li, Zachary Joseph Zumbo, John Robert Murphy
  • Patent number: 11379646
    Abstract: The present disclosure relates to electronic circuit design, and more specifically, to determining the computational requirements of fully synthesizing a printed circuit board and/or package. Embodiments may include receiving, using a processor, one or more PCB electronic design files and determining whether the PCB electronic design files include data required for a synthesis engine. If any data is missing, the method may include inferring one or more parameters using an inference engine and providing the one or more parameters to the synthesis engine, wherein the synthesis engine includes at least one of a placement, via assignment, routing, and metal pouring processes. The method may also include collecting process data from the placement, via assignment, routing, and metal pouring processes and training a machine learning system using the process data.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: July 5, 2022
    Assignee: Cadence Design Systems, Inc.
    Inventors: Jorge Alejandro Gonzalez, Shang Li, Luke Roberto