Patents by Inventor Luke T. Orsini

Luke T. Orsini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • HEAT DISSIPATION
    Publication number: 20150098190
    Abstract: Embodiments are directed to an apparatus comprising a thermal block coupled to an electronic device, a thermal strap coupled to the thermal block, and retention hardware coupled to the thermal strap and configured to retain the thermal block within the thermal strap when the apparatus is exposed to at least one variable environmental condition.
    Type: Application
    Filed: June 7, 2013
    Publication date: April 9, 2015
    Inventors: Luke T. Orsini, Charles V. DeSantis, Shun-Tien Lin, Kerry R. Querns, Kenneth J. Trotman, David Perley
  • Vertical mount transient voltage suppressor array
    Patent number: 8638535
    Abstract: A system comprises a package with top and bottom surfaces, a plurality of high-power transient voltage suppressors arranged within the package, and a robust lead frame. Each of the transient voltage suppressors has first and second major surfaces substantially perpendicular to the top and bottom surfaces of the package. The lead frame comprises leads connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (or 0.381 mm) in a mounting portion, in order to dissipate heat from the transient voltage suppressors and to resist vibration-induced stress on the package.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: January 28, 2014
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Kevin P. Roy, Richard A. Poisson, Jay W. Kokas, Edward John Marotta, Robert C. Hoeckele, Luke T. Orsini, Marc S. McCloud, Matthew S. Fitzpatrick
  • Architecture using integrated backup control and protection hardware
    Patent number: 8340793
    Abstract: An electronic control configuration includes at least one secondary microprocessor operable to control a device. The at least one secondary microprocessor assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector. The at least one secondary microprocessor assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector. The backup control functionality of the at least one secondary microprocessor can be selectively disabled.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: December 25, 2012
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Jeffry K. Kamenetz, Gregory DiVincenzo, Mark A. Johnston, Jay W. Kokas, Luke T. Orsini, Steven R. Fischer, Jay H. Hartman, Kevin P. Roy, William Betterini
  • VERTICAL MOUNT TRANSIENT VOLTAGE SUPPRESSOR ARRAY
    Publication number: 20120176716
    Abstract: A system comprises a package with top and bottom surfaces, a plurality of high-power transient voltage suppressors arranged within the package, and a robust lead frame. Each of the transient voltage suppressors has first and second major surfaces substantially perpendicular to the top and bottom surfaces of the package. The lead frame comprises leads connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (or 0.381 mm) in a mounting portion, in order to dissipate heat from the transient voltage suppressors and to resist vibration-induced stress on the package.
    Type: Application
    Filed: January 10, 2011
    Publication date: July 12, 2012
    Applicant: HAMILTON SUNDSTRAND CORPORATION
    Inventors: Kevin P. Roy, Richard A. Poisson, Jay W. Kokas, Edward John Marotta, Robert C. Hoeckele, Luke T. Orsini, Marc S. McCloud, Matthew S. Fitzpatrick
  • ARCHITECTURE USING INTEGRATED BACKUP CONTROL AND PROTECTION HARDWARE
    Publication number: 20110087343
    Abstract: An electronic control configuration includes at least one secondary microprocessor operable to control a device. The at least one secondary microprocessor assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector. The at least one secondary microprocessor assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector. The backup control functionality of the at least one secondary microprocessor can be selectively disabled.
    Type: Application
    Filed: June 1, 2010
    Publication date: April 14, 2011
    Inventors: Jeffry K. Kamenetz, Gregory DiVincenzo, Mark A. Johnston, Jay W. Kokas, Luke T. Orsini, Steven R. Fischer, Jay H. Hartman, Kevin P. Roy, William Betterini
  • RECONFIGURABLE FULL AUTHORITY DIGITAL ELECTRONIC CONTROL HOUSING
    Publication number: 20100263900
    Abstract: A Full Authority Digital Controller (FADEC) has a stamped housing body, a FADEC circuit assembly within the housing body, and a cover. An electrical connector is mounted to the housing body.
    Type: Application
    Filed: December 4, 2009
    Publication date: October 21, 2010
    Inventors: Gregory DiVincenzo, Jeffry K. Kamenetz, Jay H. Hartman, Luke T. Orsini