Patents by Inventor Lulu YE

Lulu YE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11329075
    Abstract: An array substrate, its fabricating method, a display panel and a display device are disclosed. The method includes forming an active layer on a substrate, forming a gate layer on a side of the active layer facing or away from the substrate; forming an interlayer dielectric layer on a side of the active layer away from the substrate, which includes a first, second, third and fourth film stacked in this order in a direction away from the substrate; forming a via hole extending from the interlayer dielectric layer to the active layer; forming a source and drain layer on a side of the interlayer dielectric layer away from the substrate, and in a region not covered by the source and drain layer, removing the fourth film in the interlayer dielectric layer at a same time as forming the source and drain layer.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: May 10, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lulu Ye, Lei Yao, Kai Zhang, Dawei Shi, Nana Gao, Panpan Zhang
  • Publication number: 20210202543
    Abstract: An array substrate, its fabricating method, a display panel and a display device are disclosed. The method includes forming an active layer on a substrate, forming a gate layer on a side of the active layer facing or away from the substrate; forming an interlayer dielectric layer on a side of the active layer away from the substrate, which includes a first, second, third and fourth film stacked in this order in a direction away from the substrate; forming a via hole extending from the interlayer dielectric layer to the active layer; forming a source and drain layer on a side of the interlayer dielectric layer away from the substrate, and in a region not covered by the source and drain layer, removing the fourth film in the interlayer dielectric layer at a same time as forming the source and drain layer.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 1, 2021
    Inventors: Lulu YE, Lei YAO, Kai ZHANG, Dawei SHI, Nana GAO, Panpan ZHANG
  • Patent number: 10564772
    Abstract: The present disclosure provides an array substrate, its driving method and manufacturing method, and a display device. The array substrate includes a transistor layer arranged on a base, and a first transparent conductive layer, a first insulation layer, a second transparent conductive layer, a second insulation layer and a third transparent conductive layer sequentially arranged on the transistor layer. The first transparent conductive layer covers the transistor layer at a display area, the second transparent conductive layer includes a pattern of touch electrodes, and the third transparent conductive layer includes a pattern of pixel electrodes. Within any pixel area of the display area, the pixel electrode is connected to a pixel electrode connection end of the transistor layer through a via-hole in the first insulation layer and the second insulation layer, and the first transparent conductive layer is provided with an opening at a position corresponding to the via-hole.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: February 18, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Chaochao Sun, Huafeng Liu, Shengwei Zhao, Kai Zhang, Lei Yang, Lulu Ye, Jingping Lv, Chao Wang, Chongliang Hu, Meng Yang, Duolong Ding, Bule Shun, Lin Xie, Yao Li, Shimin Sun
  • Patent number: 10120256
    Abstract: Preparation method for a thin film transistor, preparation method for an array substrate, an array substrate, and a display apparatus are provided. The preparation method for a thin film transistor includes: forming, on a pattern of a semiconductor layer, a first photoresist pattern including a photoresist with two different thicknesses, and performing a heavily-doped ion implantation process on the pattern of the semiconductor layer by using the first photoresist pattern as a barrier mask; ashing the first photoresist pattern to remove the photoresist with a second thickness and to thin the photoresist with a first thickness, so as to form a second photoresist pattern; and performing a lightly-doped ion implantation process on the pattern of the semiconductor layer by using the second photoresist pattern as a barrier mask.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: November 6, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lulu Ye, Huafeng Liu, Jingping Lv, Lei Yang, Meng Yang, Kai Zhang, Chao Wang, Chaochao Sun, Shengwei Zhao
  • Publication number: 20170329163
    Abstract: Preparation method for a thin film transistor, preparation method for an array substrate, an array substrate, and a display apparatus are provided. The preparation method for a thin film transistor includes: forming, on a pattern of a semiconductor layer, a first photoresist pattern including a photoresist with two different thicknesses, and performing a heavily-doped ion implantation process on the pattern of the semiconductor layer by using the first photoresist pattern as a barrier mask; ashing the first photoresist pattern to remove the photoresist with a second thickness and to thin the photoresist with a first thickness, so as to form a second photoresist pattern; and performing a lightly-doped ion implantation process on the pattern of the semiconductor layer by using the second photoresist pattern as a barrier mask.
    Type: Application
    Filed: December 31, 2015
    Publication date: November 16, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD
    Inventors: Lulu YE, Huafeng LIU, Jingping LV, Lei YANG, Meng YANG, Kai ZHANG, Chao WANG, Chaochao SUN, Shengwei ZHAO
  • Publication number: 20170205953
    Abstract: The present disclosure provides an array substrate, its driving method and manufacturing method, and a display device. The array substrate includes a transistor layer arranged on a base, and a first transparent conductive layer, a first insulation layer, a second transparent conductive layer, a second insulation layer and a third transparent conductive layer sequentially arranged on the transistor layer. The first transparent conductive layer covers the transistor layer at a display area, the second transparent conductive layer includes a pattern of touch electrodes, and the third transparent conductive layer includes a pattern of pixel electrodes. Within any pixel area of the display area, the pixel electrode is connected to a pixel electrode connection end of the transistor layer through a via-hole in the first insulation layer and the second insulation layer, and the first transparent conductive layer is provided with an opening at a position corresponding to the via-hole.
    Type: Application
    Filed: August 10, 2016
    Publication date: July 20, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Chaochao SUN, Huafeng LIU, Shengwei ZHAO, Kai ZHANG, Lei YANG, Lulu YE, Jingping LV, Chao WANG, Chongliang HU, Meng YANG, Duolong DING, Bule SHUN, Lin XIE, Yao LI, Shimin SUN