Abstract: A mixer includes a trans conductance unit, a gain boost unit, a mixing module and a buffer. The trans conductance unit, the gain boost unit and the mixing module cooperatively mix a differential input voltage signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair. The buffer performs buffering on the differential mixed voltage signal pair, and has inductance that cooperates with parasitic capacitance at output terminals thereof to form an LC tank circuit that reaches resonance at a frequency of the differential mixed voltage signal pair to behave as an open circuit.

Abstract: A mixer includes a trans conductance unit, a gain boost unit, a mixing module and a buffer. The trans conductance unit, the gain boost unit and the mixing module cooperatively mix a differential input voltage signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair. The buffer performs buffering on the differential mixed voltage signal pair, and has inductance that cooperates with parasitic capacitance at output terminals thereof to form an LC tank circuit that reaches resonance at a frequency of the differential mixed voltage signal pair to behave as an open circuit.

Abstract: A balanced up-conversion mixer includes: a negative resistance compensation circuit generating and outputting first and second currents based on a DC bias voltage; a mixing circuit allowing a differential radio frequency current (DRFC) signal pair to flow thereinto based on the first and second currents from the negative resistance compensation circuit, a differential oscillating voltage (DOV) signal pair and a differential intermediate frequency voltage (DIFV) signal pair; and a load circuit outputting a differential radio frequency voltage signal pair based on its impedance, the DC bias voltage and the DRFC signal pair. The DRFC signal pair has a frequency associated with those of the DOV and DIFV signal pairs.

Abstract: A balanced up-conversion mixer includes: a negative resistance compensation circuit generating and outputting first and second currents based on a DC bias voltage; a mixing circuit allowing a differential radio frequency current (DRFC) signal pair to flow thereinto based on the first and second currents from the negative resistance compensation circuit, a differential oscillating voltage (DOV) signal pair and a differential intermediate frequency voltage (DIFV) signal pair; and a load circuit outputting a differential radio frequency voltage signal pair based on its impedance, the DC bias voltage and the DRFC signal pair. The DRFC signal pair has a frequency associated with those of the DOV and DIFV signal pairs.

Abstract: A mixer includes a transconductance unit, a gain boost unit, a mixing module and a buffer. The transconductance unit converts a differential input voltage signal pair into a differential input current signal pair. The gain boost unit generates an auxiliary current signal pair that constitutes a portion of the differential input current signal pair. The mixing module mixes a remaining portion of the differential input current signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair. The buffer performs buffering on the differential mixed voltage signal pair.

Abstract: An ultra-wideband low-noise amplifier circuit with low power consumption includes a cascode amplifier circuit module and an output combining circuit module. The cascode amplifier circuit module receives an input signal, and outputs a first output signal and a second output signal. The output combining circuit module receives the first output signal and the second output signal, and applies respective phase shifts to the first output signal and the second output signal for reducing a phase difference between the first output signal and the second output signal, so as to obtain a combined output signal.

Abstract: An ultra-wideband low-noise amplifier circuit with low power consumption includes a cascode amplifier circuit module and an output combining circuit module. The cascode amplifier circuit module receives an input signal, and outputs a first output signal and a second output signal. The output combining circuit module receives the first output signal and the second output signal, and applies respective phase shifts to the first output signal and the second output signal for reducing a phase difference between the first output signal and the second output signal, so as to obtain a combined output signal.