Patents by Inventor Lung-Chun Liu

Lung-Chun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8095898
    Abstract: Disclosed are improved approaches for implementing design entry. An efficient, spread-sheet based representation is provided for both the instances and connections in a design. Visualization techniques provide the user with visual cues, to direct and identify compatible connection points, unconnected instances, and contention situations. Techniques are disclosed to automatically filter the spreadsheet in a variety of ways, to help the user to dynamically hide portions of the design space that are not interesting at a particular time, and thus to improve the efficiency with which they can work.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: January 10, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Ping-Chih Wu, Lung-Chun Liu, Wei-Jin Dai, Thad Clay McCracken
  • Patent number: 6789242
    Abstract: A method for displaying a schematic diagram of a circuit showing multiple time-frame signal values across storage elements includes identifying one or more time-frames in a circuit. The one or more time-frames are determined from a number of consecutive storage elements in a signal path in the circuit. The method also includes receiving a request to display signal values associated with a first storage element at a time-frame t. The method further includes displaying a first signal value carried on a first signal line coupled to an output of the first storage element at time-frame t and displaying a second signal value carried on a second signal line coupled to an input of the first storage element at time-frame t−1. In another embodiment, the method identifies any loops that are in the circuit. In a loop, a signal value comes from a gate at a time-frame and loops back to a loop-back gate at an earlier time-frame.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: September 7, 2004
    Assignee: Cadence Design Systems, Inc.
    Inventor: Lung-Chun Liu