Patents by Inventor Lung-Fai Tuen
Lung-Fai Tuen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11757176Abstract: An antenna structure includes a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, and a fifth radiation element. The first radiation element has a feeding point. The second radiation element is coupled to the feeding point. The second radiation element is at least partially surrounded by the first radiation element. The third radiation element is coupled to a ground voltage. The fourth radiation element is coupled to the third radiation element. The fifth radiation element is coupled to the third radiation element. The fifth radiation element is at least partially surrounded by the third radiation element and the fourth radiation element.Type: GrantFiled: November 8, 2021Date of Patent: September 12, 2023Assignee: WISTRON CORP.Inventors: Shih Ming Chuang, Lung-Fai Tuen, Pei-Cheng Hu
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Publication number: 20230115428Abstract: An antenna structure includes a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, and a fifth radiation element. The first radiation element has a feeding point. The second radiation element is coupled to the feeding point. The second radiation element is at least partially surrounded by the first radiation element. The third radiation element is coupled to a ground voltage. The fourth radiation element is coupled to the third radiation element. The fifth radiation element is coupled to the third radiation element. The fifth radiation element is at least partially surrounded by the third radiation element and the fourth radiation element.Type: ApplicationFiled: November 8, 2021Publication date: April 13, 2023Inventors: Shih Ming CHUANG, Lung-Fai TUEN, Pei-Cheng HU
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Patent number: 9313879Abstract: A motherboard with an electrostatic discharge protection (ESD) function including a first electrode, a second electrode, an isolation region and an energy storage unit is disclosed. The first electrode receives a grounding level. The second electrode includes at least one solder pad to fix an input/output port thereon. The isolation region is disposed between the first and the second electrodes. The energy storage unit is coupled between the first and the second electrodes and disposed across the isolation region.Type: GrantFiled: October 17, 2013Date of Patent: April 12, 2016Assignee: WISTRON CORP.Inventors: Lung-Fai Tuen, Wen-Hsien Wang, Chiu-Hsien Chang
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Patent number: 9263355Abstract: An electronic signal transmitting device is disposed in a housing of an integrated circuit. The integrated circuit includes at least one first signal end and at least one second signal end. The electronic signal transmitting device includes at least one electromagnetic transmitting unit, coupled between the first signal end and the second signal end for transmitting an electronic signal between the first signal end and the second signal end; and an electromagnetic insulating layer covering the electromagnetic transmitting unit for protecting the integrated circuit from electromagnetic interference.Type: GrantFiled: September 11, 2013Date of Patent: February 16, 2016Assignee: Wistron CorporationInventors: Lung-Fai Tuen, Chi-Fang Weng, Wei-Cheng Lin, Hong-Kuei Lee, Wei-Shuen Chang, Wei-Shen Chu
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Patent number: 9065273Abstract: A power adaptor for converting an alternating voltage into a direct voltage to a load is disclosed. The power adaptor includes a primary side circuit including a hot line, a neutral line for receiving the alternating voltage, and a return terminal, a secondary side circuit including a positive output terminal and a negative output terminal for outputting the direct voltage, and a protection circuit including a first non-linear resistor coupled to the return terminal of the primary side circuit and the negative output terminal of the secondary side circuit forming an electrostatic discharge path for an electrostatic current generated by the load.Type: GrantFiled: May 16, 2013Date of Patent: June 23, 2015Assignee: Wistron CorporationInventors: Lung-Fai Tuen, Chiu-Hsien Chang
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Patent number: 9000795Abstract: An electrical collecting cover for covering an electrostatic gun is disclosed. The electrical collecting cover includes a connecting portion for connecting with a main body of the electrostatic gun, a shielding portion connected to the connecting portion for shielding the main body of the electrostatic gun, a sleeve portion connected to the shielding portion for sheathing with a discharging head of the electrostatic gun, and an electrostatic discharge portion connected to the sleeve portion and located on a side of the discharging head for guiding static electricity from the discharging head of the electrostatic gun as the sleeve portion sheathes with the discharging head of the electrostatic gun.Type: GrantFiled: October 5, 2011Date of Patent: April 7, 2015Assignee: Wistron CorporationInventors: Chiu-Hsien Chang, Lung-Fai Tuen, Wei-Cheng Lin
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Publication number: 20150009630Abstract: An electronic signal transmitting device is disposed in a housing of an integrated circuit. The integrated circuit includes at least one first signal end and at least one second signal end. The electronic signal transmitting device includes at least one electromagnetic transmitting unit, coupled between the first signal end and the second signal end for transmitting an electronic signal between the first signal end and the second signal end; and an electromagnetic insulating layer covering the electromagnetic transmitting unit for protecting the integrated circuit from electromagnetic interference.Type: ApplicationFiled: September 11, 2013Publication date: January 8, 2015Applicant: Wistron CorporationInventors: Lung-Fai Tuen, Chi-Fang Weng, Wei-Cheng Lin, Hong-Kuei Lee, Wei-Shuen Chang, Wei-Shen Chu
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Publication number: 20140240876Abstract: A motherboard with an electrostatic discharge protection (ESD) function including a first electrode, a second electrode, an isolation region and an energy storage unit is disclosed. The first electrode receives a grounding level. The second electrode includes at least one solder pad to fix an input/output port thereon. The isolation region is disposed between the first and the second electrodes. The energy storage unit is coupled between the first and the second electrodes and disposed across the isolation region.Type: ApplicationFiled: October 17, 2013Publication date: August 28, 2014Applicant: Wistron Corp.Inventors: Lung-Fai TUEN, Wen-Hsien WANG, Chiu-Hsien CHANG
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Patent number: 8816693Abstract: An ESD test method for testing an object is disclosed. The object is activated and controlled to separate from a horizontal plane by a pre-determined distance. A first discharge voltage is provided to an external metal portion of the object. A first error is determined to have or have not occurred during the operation of the object each time after the first discharge voltage is provided to the external metal portion. The object is processed to eliminate the first error and then the first discharge voltage is provided to the external metal portion when the first error occurs during the operation of the object. The first error is induced by a hardware structure of the object. The object is moved to contact with the horizontal plane and a specific action is executed when the first error has not occurred during the operation of the object.Type: GrantFiled: June 28, 2012Date of Patent: August 26, 2014Assignee: Wistron Corp.Inventors: Lung-Fai Tuen, Chiu-Hsien Chang
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Patent number: 8693152Abstract: A Power over Ethernet (PoE) Power Device (PD) circuit and a protection circuit of electrostatic discharge (ESD) thereof are provided. The protection circuit of ESD includes a transient voltage suppressor (TVS) and a high-voltage capacitor, wherein the TVS and the high-voltage capacitor are coupled in series between a negative power terminal and a grounding terminal to reduce system malfunctions or damages when ESD or transient voltage surge occurs.Type: GrantFiled: May 29, 2012Date of Patent: April 8, 2014Assignee: Wistron Corp.Inventors: Lung-Fai Tuen, Shan-Hung Wang, Chiu-Hsien Chang
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Publication number: 20140049863Abstract: A power adaptor for converting an alternating voltage into a direct voltage to a load is disclosed. The power adaptor includes a primary side circuit including a hot line, a neutral line for receiving the alternating voltage, and a return terminal, a secondary side circuit including a positive output terminal and a negative output terminal for outputting the direct voltage, and a protection circuit including a first non-linear resistor coupled to the return terminal of the primary side circuit and the negative output terminal of the secondary side circuit forming an electrostatic discharge path for an electrostatic current generated by the load.Type: ApplicationFiled: May 16, 2013Publication date: February 20, 2014Applicant: Wistron CorporationInventors: Lung-Fai Tuen, Chiu-Hsien Chang
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Publication number: 20130300427Abstract: An ESD test method for testing an object is disclosed. The object is activated and controlled to separate from a horizontal plane by a pre-determined distance. A first discharge voltage is provided to an external metal portion of the object. A first error is determined to have or have not occurred during the operation of the object each time after the first discharge voltage is provided to the external metal portion. The object is processed to eliminate the first error and then the first discharge voltage is provided to the external metal portion when the first error occurs during the operation of the object. The first error is induced by a hardware structure of the object. The object is moved to contact with the horizontal plane and a specific action is executed when the first error has not occurred during the operation of the object.Type: ApplicationFiled: June 28, 2012Publication date: November 14, 2013Applicant: WISTRON CORP.Inventors: Lung-Fai Tuen, Chiu-Hsien Chang
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Publication number: 20130031383Abstract: A Power over Ethernet (PoE) Power Device (PD) circuit and a protection circuit of electrostatic discharge (ESD) thereof are provided. The protection circuit of ESD includes a transient voltage suppressor (TVS) and a high-voltage capacitor, wherein the TVS and the high-voltage capacitor are coupled in series between a negative power terminal and a grounding terminal to reduce system malfunctions or damages when ESD or transient voltage surge occurs.Type: ApplicationFiled: May 29, 2012Publication date: January 31, 2013Applicant: WISTRON CORP.Inventors: LUNG-FAI TUEN, SHAN-HUNG WANG, CHIU-HSIEN CHANG
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Publication number: 20120320557Abstract: An electrical collecting cover for covering an electrostatic gun is disclosed. The electrical collecting cover includes a connecting portion for connecting with a main body of the electrostatic gun, a shielding portion connected to the connecting portion for shielding the main body of the electrostatic gun, a sleeve portion connected to the shielding portion for sheathing with a discharging head of the electrostatic gun, and an electrostatic discharge portion connected to the sleeve portion and located on a side of the discharging head for guiding static electricity from the discharging head of the electrostatic gun as the sleeve portion sheathes with the discharging head of the electrostatic gun.Type: ApplicationFiled: October 5, 2011Publication date: December 20, 2012Inventors: Chiu-Hsien CHANG, Lung-Fai TUEN, Wei-Cheng LIN
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Patent number: 8305771Abstract: An electromagnetic interference suppressing device includes a plurality of signal guiding units coupled to a metal housing of an electronic component for receiving a plurality of signals transmitted from the metal housing (the electronic component is installed on a circuit board), a plurality of grounding units coupled to a plurality of ground pads of the circuit board for transmitting the plurality of signals to the plurality of ground pads, and a main body coupled to the plurality of signal guiding units and the plurality of grounding units for transmitting the plurality of signals between the plurality of signal guiding units and the plurality of grounding units so as to implement a return path.Type: GrantFiled: February 25, 2010Date of Patent: November 6, 2012Assignee: Wistron CorporationInventors: Lung-Fai Tuen, Chiu-Hsien Chang, Hong-Kuei Lee, Chi-Fang Weng, Chen-Yu Li
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Patent number: 7928327Abstract: A shielding device configured to provide EMI and ESD protection includes an anti-ESD layer, a conductive layer, and an EMI blocking layer attached to each other in sequence. In addition, a supporting layer can be optionally attached to the EMI blocking layer to increase the strength of the shielding device.Type: GrantFiled: August 18, 2008Date of Patent: April 19, 2011Assignee: Wistron CorporationInventors: Lung-Fai Tuen, Andy C.H. Chang
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Publication number: 20100246154Abstract: An electromagnetic interference suppressing device includes a plurality of signal guiding units coupled to a metal housing of an electronic component for receiving a plurality of signals transmitted from the metal housing (the electronic component is installed on a circuit board), a plurality of grounding units coupled to a plurality of ground pads of the circuit board for transmitting the plurality of signals to the plurality of ground pads, and a main body coupled to the plurality of signal guiding units and the plurality of grounding units for transmitting the plurality of signals between the plurality of signal guiding units and the plurality of grounding units so as to implement a return path.Type: ApplicationFiled: February 25, 2010Publication date: September 30, 2010Inventors: Lung-Fai Tuen, Chiu-Hsien Chang, Hong-Kuei Lee, Chi-Fang Weng, Chen-Yu Li
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Publication number: 20090114437Abstract: A shielding device configured to provide EMI and ESD protection includes an anti-ESD layer, a conductive layer, and an EMI blocking layer attached to each other in sequence. In addition, a supporting layer can be optionally attached to the EMI blocking layer to increase the strength of the shielding device.Type: ApplicationFiled: August 18, 2008Publication date: May 7, 2009Inventors: Lung-Fai Tuen, Andy C.H. Chang
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Publication number: 20090034213Abstract: A method for suppressing an electromagnetic wave of noise of a printed circuit board comprises forming a metal conducting circuit in a conducting layer of the printed circuit board; and duplicating a plurality of pattern circuits, every two neighboring patterns with substantially the same patterns and separated space for forming a metal conducting circuit that is an electromagnetic wave suppressing circuit having an electromagnetic wave stop frequency band corresponding to the electromagnetic wave of noise.Type: ApplicationFiled: June 11, 2008Publication date: February 5, 2009Inventor: Lung-Fai Tuen